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From: "Joel Soete" <soete.joel@tiscali.be>
To: "Carlos O'Donell" <carlos@baldric.uwo.ca>
Cc: "M. Grabert" <xam@cs.ucc.ie>, parisc-linux@lists.parisc-linux.org
Subject: Re: [parisc-linux] traps.c 2.4 alignement [was: 2.6.0-test6-pa6 on b2k finaly crash]
Date: Tue, 7 Oct 2003 17:47:40 +0200	[thread overview]
Message-ID: <3F5CC41F0000EF9B@ocpmta3.freegates.net> (raw)
In-Reply-To: <20031006173401.GE27512@systemhalted>

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>> But, as we could awaiting when such code=13 (conditional trap iirc), occurs
>> in kernel mode (as on my b2k or Max's c3k) the kernel
>>hang without advise
>> :(
>
>It happens in "kernel mode" ?

Even thought it shouldn't happen but would just help in case of unthinkable
bug :)

> That should trigger an oops? It's a SIGFPE for the kernel :)

Yes it should as far as i can follow force_sig_info() it would 'schedule'
a SIGFPE. But in this very particular situation of the early boot, imho the
scheduler is not yet launched.

So may be this second draft would help more in this case?
(I hope that attachement will be readable?)

Thanks again,
    Joel


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[-- Attachment #2: Traps-2.4-Align-2 --]
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diff -Naur linux-2.6.0-test6-pa6.orig/arch/parisc/kernel/traps.c linux-2.6.0-test6-pa6.test/arch/parisc/kernel/traps.c
--- linux-2.6.0-test6-pa6.orig/arch/parisc/kernel/traps.c	2003-10-07 18:15:41.000000000 +0200
+++ linux-2.6.0-test6-pa6.test/arch/parisc/kernel/traps.c	2003-10-07 18:14:31.000000000 +0200
@@ -44,7 +44,7 @@
 #define PRINT_USER_FAULTS /* (turn this on if you want user faults to be */
 			  /*  dumped to the console via printk)          */
 
-int printbinary(char *buf, unsigned long x, int nbits)
+static int printbinary(char *buf, unsigned long x, int nbits)
 {
 	unsigned long mask = 1UL << (nbits - 1);
 	while (mask != 0) {
@@ -408,7 +408,7 @@
 
 
 /*
- * This routine handles page faults.  It determines the address,
+ * This routine handles various exception codes.  It determines the address,
  * and the problem, and then passes it off to one of the appropriate
  * routines.
  */
@@ -429,8 +429,18 @@
 	if (!console_drivers)
 		pdc_console_restart();
 
-	if (code == 1)
-	    transfer_pim_to_trap_frame(regs);
+
+	/* Not all switch paths will gutter the processor... */
+	switch(code){
+
+	case 1:
+		transfer_pim_to_trap_frame(regs);
+		break;
+	    
+	default:
+		/* Fall through */
+		break;
+	}
 
 	show_stack(NULL, (unsigned long *)regs->gr[30]);
 
@@ -446,34 +456,34 @@
 	 * system will shut down immediately right here. */
 	pdc_soft_power_button(0);
 	
+	/* Gutter the processor... */
 	for(;;)
 	    ;
 }
 
+
 void handle_interruption(int code, struct pt_regs *regs)
 {
 	unsigned long fault_address = 0;
 	unsigned long fault_space = 0;
 	struct siginfo si;
 
-	if (code == 1)
-	    pdc_console_restart();  /* switch back to pdc if HPMC */
-	else
-	    local_irq_enable();
-
-#if 0
-	printk(KERN_CRIT "Interruption # %d\n", code);
-#endif
+        /* JSO Begin */
+        printk(KERN_ERR "%s(%d, ...).\n", __FUNCTION__, code);
+	/*
+        mdelay(100);
+        JSO End */
 
 	switch(code) {
 
 	case  1:
 		/* High-priority machine check (HPMC) */
-		
+		pdc_console_restart();  /* switch back to pdc if HPMC */
+
 		/* set up a new led state on systems shipped with a LED State panel */
 		pdc_chassis_send_status(PDC_CHASSIS_DIRECT_HPMC);
-		    
-	    	parisc_terminate("High Priority Machine Check (HPMC)",
+
+		parisc_terminate("High Priority Machine Check (HPMC)",
 				regs, code, 0);
 		/* NOT REACHED */
 		
@@ -492,8 +502,9 @@
 
 	case  5:
 		/* Low-priority machine check */
+
 		pdc_chassis_send_status(PDC_CHASSIS_DIRECT_LPMC);
-		
+
 		flush_all_caches();
 		cpu_lpmc(5, regs);
 		return;
@@ -542,6 +553,7 @@
 
 		die_if_kernel("Privileged register usage", regs, code);
 		si.si_code = ILL_PRVREG;
+		/* Fall thru */
 	give_sigill:
 		si.si_signo = SIGILL;
 		si.si_errno = 0;
@@ -556,6 +568,24 @@
 		si.si_addr = (void *) regs->iaoq[0];
 		force_sig_info(SIGFPE, &si, current);
 		return;
+	
+	case 13:
+		if (user_mode(regs)) {
+#ifdef PRINT_USER_FAULTS
+			printk(KERN_DEBUG "\nhandle_interruption() pid=%d command='%s'\n",
+			    current->pid, current->comm);
+			show_regs(regs);
+#endif
+			/* Conditional Trap 
+			   The condition succees in an instruction which traps on condition  */
+			si.si_signo = SIGFPE;
+			/* Set to zero, and let the userspace app figure it out from
+			   the insn pointed to by si_addr */
+			si.si_code = 0;
+			si.si_addr = (void *) regs->iaoq[0];
+			force_sig_info(SIGFPE, &si, current);
+			return;
+		} else break;
 
 	case 14:
 		/* Assist Exception Trap, i.e. floating point exception. */
@@ -563,13 +593,22 @@
 		handle_fpe(regs);
 		return;
 
+	case 15: 
+		/* Data TLB miss fault/Data page fault */	
+		/* Fall thru */
+	case 16:
+		/* Non-access instruction TLB miss fault */
+		/* The instruction TLB entry needed for the target address of the FIC
+		   is absent, and hardware can't find it, so we get to cleanup */
+		/* Fall thru */
 	case 17:
 		/* Non-access data TLB miss fault/Non-access data page fault */
 		/* TODO: Still need to add slow path emulation code here */
-		pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC);
-		
+		/* TODO: Understand what is meant by the TODO listed 
+		   above this one. (Carlos) */
 		fault_address = regs->ior;
-		parisc_terminate("Non access data tlb fault!",regs,code,fault_address);
+		fault_space = regs->isr;
+		break;
 
 	case 18:
 		/* PCXS only -- later cpu's split this into types 26,27 & 28 */
@@ -579,9 +618,8 @@
 			return;
 		}
 		/* Fall Through */
-
-	case 15: /* Data TLB miss fault/Data page fault */
-	case 26: /* PCXL: Data memory access rights trap */
+	case 26: 
+		/* PCXL: Data memory access rights trap */
 		fault_address = regs->ior;
 		fault_space   = regs->isr;
 		break;
@@ -637,7 +675,6 @@
 			up_read(&current->mm->mmap_sem);
 		}
 		/* Fall Through */
-
 	case 27: 
 		/* Data memory protection ID trap */
 		die_if_kernel("Protection id trap", regs, code);
@@ -671,8 +708,9 @@
 			force_sig_info(SIGBUS, &si, current);
 			return;
 		}
-		pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC);
 		
+		pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC);
+
 		parisc_terminate("Unexpected interruption", regs, code, 0);
 		/* NOT REACHED */
 	}
@@ -702,18 +740,19 @@
 	     * The kernel should never fault on its own address space.
 	     */
 
-	    if (fault_space == 0) 
-	    {
+	    if (fault_space == 0) {
 		pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC);
 		parisc_terminate("Kernel Fault", regs, code, fault_address);
-	
+		/** NOT REACHED **/
 	    }
 	}
 
+	local_irq_enable();
 	do_page_fault(regs, code, fault_address);
 }
 
 
+
 int __init check_ivt(void *iva)
 {
 	int i;

  parent reply	other threads:[~2003-10-07 15:47 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2003-10-03 15:20 [parisc-linux] 2.6.0-test6-pa6 on b2k finaly crash Joel Soete
2003-10-03 15:31 ` M. Grabert
2003-10-03 15:52   ` Joel Soete
2003-10-03 15:52   ` Joel Soete
2003-10-05 15:06 ` [parisc-linux] traps.c 2.4 alignement [was: 2.6.0-test6-pa6 on b2k finaly crash] Joel Soete
2003-10-05 17:07   ` Joel Soete
2003-10-05 19:22     ` M. Grabert
2003-10-06 17:28     ` Grant Grundler
2003-10-07  7:25       ` Joel Soete
2003-10-12 13:28       ` Joel Soete
2003-10-06 14:33   ` Carlos O'Donell
2003-10-06 16:21     ` Joel Soete
2003-10-06 17:34       ` Carlos O'Donell
2003-10-07  9:49         ` Joel Soete
2003-10-07 15:47         ` Joel Soete [this message]
2003-10-07  9:58 ` [parisc-linux] 2.6.0-test6-pa6 on b2k finaly crash Joel Soete

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