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From: Reinette Chatre <reinette.chatre@intel.com>
To: James Morse <james.morse@arm.com>,
	x86@kernel.org, linux-kernel@vger.kernel.org
Cc: Fenghua Yu <fenghua.yu@intel.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	"H . Peter Anvin" <hpa@zytor.com>,
	Babu Moger <Babu.Moger@amd.com>
Subject: Re: [PATCH 10/10] cacheinfo: Move resctrl's get_cache_id() to the cacheinfo header file
Date: Mon, 16 Mar 2020 13:31:53 -0700	[thread overview]
Message-ID: <3a20be0d-4d5f-cc0b-38d9-1ad8d648acac@intel.com> (raw)
In-Reply-To: <20200214182401.39008-11-james.morse@arm.com>

Hi James,

On 2/14/2020 10:24 AM, James Morse wrote:
> resctrl/core.c defines get_cache_id() for use in its cpu-hotplug
> callbacks. This gets the id attribute of the cache at the corresponding
> level of a cpu.
> 
> Later rework means this private function needs to be shared. Move
> it to the header file.
> 
> The name conflicts with a different definition in intel_cacheinfo.c,
> name it get_cpu_cacheinfo_id() to show its relation with
> get_cpu_cacheinfo().
> 
> Now this is visible on other architectures, check the id attribute
> has actually been set.
> 
> Signed-off-by: James Morse <james.morse@arm.com>
> ---
>  arch/x86/kernel/cpu/resctrl/core.c | 17 ++---------------
>  include/linux/cacheinfo.h          | 18 ++++++++++++++++++
>  2 files changed, 20 insertions(+), 15 deletions(-)
> 
> diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c
> index 7c9c4bd5fd32..f2968fb6fb9a 100644
> --- a/arch/x86/kernel/cpu/resctrl/core.c
> +++ b/arch/x86/kernel/cpu/resctrl/core.c
> @@ -349,19 +349,6 @@ static void rdt_get_cdp_l2_config(void)
>  	rdt_get_cdp_config(RDT_RESOURCE_L2, RDT_RESOURCE_L2CODE);
>  }
>  
> -static int get_cache_id(int cpu, int level)
> -{
> -	struct cpu_cacheinfo *ci = get_cpu_cacheinfo(cpu);
> -	int i;
> -
> -	for (i = 0; i < ci->num_leaves; i++) {
> -		if (ci->info_list[i].level == level)
> -			return ci->info_list[i].id;
> -	}
> -
> -	return -1;
> -}
> -
>  static void
>  mba_wrmsr_amd(struct rdt_domain *d, struct msr_param *m, struct rdt_resource *r)
>  {
> @@ -559,7 +546,7 @@ static int domain_setup_mon_state(struct rdt_resource *r, struct rdt_domain *d)
>   */
>  static void domain_add_cpu(int cpu, struct rdt_resource *r)
>  {
> -	int id = get_cache_id(cpu, r->cache_level);
> +	int id = get_cpu_cacheinfo_id(cpu, r->cache_level);
>  	struct list_head *add_pos = NULL;
>  	struct rdt_domain *d;
>  
> @@ -603,7 +590,7 @@ static void domain_add_cpu(int cpu, struct rdt_resource *r)
>  
>  static void domain_remove_cpu(int cpu, struct rdt_resource *r)
>  {
> -	int id = get_cache_id(cpu, r->cache_level);
> +	int id = get_cpu_cacheinfo_id(cpu, r->cache_level);
>  	struct rdt_domain *d;
>  
>  	d = rdt_find_domain(r, id, NULL);
> diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h
> index 46b92cd61d0c..e210225ab7a8 100644
> --- a/include/linux/cacheinfo.h
> +++ b/include/linux/cacheinfo.h
> @@ -3,6 +3,7 @@
>  #define _LINUX_CACHEINFO_H
>  
>  #include <linux/bitops.h>
> +#include <linux/cpu.h>
>  #include <linux/cpumask.h>
>  #include <linux/smp.h>
>  
> @@ -119,4 +120,21 @@ int acpi_find_last_cache_level(unsigned int cpu);
>  
>  const struct attribute_group *cache_get_priv_group(struct cacheinfo *this_leaf);
>  
> +/* Get the id of a particular cache on @cpu. cpuhp lock must held. */

Technically the cache is not _on_ @cpu. How about "Get the id of the
cache associated with @cpu at level @level"?

Also, s/must held/must be held/

> +static inline int get_cpu_cacheinfo_id(int cpu, int level)
> +{
> +	struct cpu_cacheinfo *ci = get_cpu_cacheinfo(cpu);
> +	int i;
> +
> +	for (i = 0; i < ci->num_leaves; i++) {
> +		if (ci->info_list[i].level == level){

Typo here. Could you please insert a space before the open brace?

> +			if (ci->info_list[i].attributes & CACHE_ID)
> +				return ci->info_list[i].id;
> +			return -1;
> +		}
> +	}
> +
> +	return -1;
> +}
> +
>  #endif /* _LINUX_CACHEINFO_H */
> 

The resctrl bits look good to me.

Thank you

Reinette

      reply	other threads:[~2020-03-16 20:31 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-14 18:23 [PATCH 00/10] x86/resctrl: Misc cleanup James Morse
2020-02-14 18:23 ` [PATCH 01/10] x86/resctrl: Nothing uses struct mbm_state chunks_bw James Morse
2020-03-16 18:09   ` Reinette Chatre
2020-02-14 18:23 ` [PATCH 02/10] x86/resctrl: Remove max_delay James Morse
2020-03-16 18:11   ` Reinette Chatre
2020-02-14 18:23 ` [PATCH 03/10] x86/resctrl: Fix stale comment James Morse
2020-03-16 18:12   ` Reinette Chatre
2020-02-14 18:23 ` [PATCH 04/10] x86/resctrl: use container_of() in delayed_work handlers James Morse
2020-03-16 18:13   ` Reinette Chatre
2020-02-14 18:23 ` [PATCH 05/10] x86/resctrl: Include pid.h James Morse
2020-03-16 18:13   ` Reinette Chatre
2020-02-14 18:23 ` [PATCH 06/10] x86/resctrl: Use is_closid_match() in more places James Morse
2020-03-16 18:15   ` Reinette Chatre
2020-02-14 18:23 ` [PATCH 07/10] x86/resctrl: Add arch_needs_linear to explain AMD/Intel MBA difference James Morse
2020-03-16 18:37   ` Reinette Chatre
2020-02-14 18:23 ` [PATCH 08/10] x86/resctrl: Merge AMD/Intel parse_bw() calls James Morse
2020-03-16 18:42   ` Reinette Chatre
2020-02-14 18:24 ` [PATCH 09/10] x86/resctrl: Add arch_has_sparse_bitmaps to explain AMD/Intel CAT difference James Morse
2020-03-16 18:58   ` Reinette Chatre
2020-02-14 18:24 ` [PATCH 10/10] cacheinfo: Move resctrl's get_cache_id() to the cacheinfo header file James Morse
2020-03-16 20:31   ` Reinette Chatre [this message]

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