From: Jan Beulich <jbeulich@suse.com>
To: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: "Andrew Cooper" <andrew.cooper3@citrix.com>,
"Teddy Astie" <teddy.astie@vates.tech>,
"Roger Pau Monné" <roger@xenproject.org>
Subject: [PATCH 23/30] x86emul: support APX+CMPccXADD insns
Date: Wed, 11 Nov 2026 15:29:48 +0100 [thread overview]
Message-ID: <3a2a93ac-b6bd-447e-a6fa-e547c420df55@suse.com> (raw)
In-Reply-To: <17d56a5d-41f2-4691-aea7-d6dfdde5ad32@suse.com>
This group of promoted-from-VEX insns is again handled by transforming
to the VEX counterparts.
In the test harness'es predicates tables also replace the original (VEX)
entries to use the available CND().
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/tools/tests/x86_emulator/evex-disp8.c
+++ b/tools/tests/x86_emulator/evex-disp8.c
@@ -1096,6 +1096,13 @@ static const struct test apx_nci[] = {
#undef COND
};
+static const struct test cmpccxadd[] = {
+#define COND(c, n) \
+ INSN(cmp##c##xadd, 66, 0f38, e0 | (n), el, dq, no)
+ CONDS(),
+#undef COND
+};
+
#undef CONDS
static const struct test adx[] = {
@@ -1737,6 +1744,7 @@ void evex_disp8_test(void *instr, struct
RUN(avx512bw);
RUN(bmi1);
RUN(bmi2);
+ RUN(cmpccxadd);
#undef RUN
--- a/tools/tests/x86_emulator/predicates.c
+++ b/tools/tests/x86_emulator/predicates.c
@@ -1422,22 +1422,7 @@ static const struct vex {
{ { 0xdd }, 2, T, R, pfx_66, WIG, Ln }, /* vaesenclast */
{ { 0xde }, 2, T, R, pfx_66, WIG, Ln }, /* vaesdec */
{ { 0xdf }, 2, T, R, pfx_66, WIG, Ln }, /* vaesdeclast */
- { { 0xe0 }, 2, F, W, pfx_66, Wn, L0 }, /* cmpoxadd */
- { { 0xe1 }, 2, F, W, pfx_66, Wn, L0 }, /* cmpnoxadd */
- { { 0xe2 }, 2, F, W, pfx_66, Wn, L0 }, /* cmpbxadd */
- { { 0xe3 }, 2, F, W, pfx_66, Wn, L0 }, /* cmpnbxadd */
- { { 0xe4 }, 2, F, W, pfx_66, Wn, L0 }, /* cmpexadd */
- { { 0xe5 }, 2, F, W, pfx_66, Wn, L0 }, /* cmpnexadd */
- { { 0xe6 }, 2, F, W, pfx_66, Wn, L0 }, /* cmpbexadd */
- { { 0xe7 }, 2, F, W, pfx_66, Wn, L0 }, /* cmpaxadd */
- { { 0xe8 }, 2, F, W, pfx_66, Wn, L0 }, /* cmpsxadd */
- { { 0xe9 }, 2, F, W, pfx_66, Wn, L0 }, /* cmpnsxadd */
- { { 0xea }, 2, F, W, pfx_66, Wn, L0 }, /* cmppxadd */
- { { 0xeb }, 2, F, W, pfx_66, Wn, L0 }, /* cmpnpxadd */
- { { 0xec }, 2, F, W, pfx_66, Wn, L0 }, /* cmplxadd */
- { { 0xed }, 2, F, W, pfx_66, Wn, L0 }, /* cmpgexadd */
- { { 0xee }, 2, F, W, pfx_66, Wn, L0 }, /* cmplexadd */
- { { 0xef }, 2, F, W, pfx_66, Wn, L0 }, /* cmpgxadd */
+ CND(0xe0, 2, F, W, pfx_66, Wn, L0 ), /* cmp<cc>xadd */
{ { 0xf2 }, 2, T, R, pfx_no, Wn, L0 }, /* andn */
{ { 0xf3, 0x08 }, 2, T, R, pfx_no, Wn, L0 }, /* blsr */
{ { 0xf3, 0x10 }, 2, T, R, pfx_no, Wn, L0 }, /* blsmsk */
@@ -2067,6 +2052,7 @@ static const struct evex {
{ { 0xde }, 2, T, R, pfx_66, WIG, Ln }, /* vaesdec */
{ { 0xdf }, 2, T, R, pfx_66, WIG, Ln }, /* vaesdeclast */
#ifdef __x86_64__
+ CND(0xe0, 2, F, W, pfx_66, Wn, L0 ), /* cmp<cc>xadd */
{ { 0xf2 }, 2, T, R, pfx_no, Wn, L0 }, /* andn */
{ { 0xf3, 0x08 }, 2, T, R, pfx_no, Wn, L0 }, /* blsr */
{ { 0xf3, 0x10 }, 2, T, R, pfx_no, Wn, L0 }, /* blsmsk */
--- a/tools/tests/x86_emulator/test_x86_emulator.c
+++ b/tools/tests/x86_emulator/test_x86_emulator.c
@@ -2293,6 +2293,41 @@ int main(int argc, char **argv)
(res[2] + 1) )
goto fail;
printf("okay\n");
+
+ if ( cpu_has_apx_f )
+ {
+ printf("%-40s", "Testing cmpnpxadd %ebx,%r9d,-4(%r18)...");
+ instr[0] = 0x62; instr[1] = 0x7a; instr[2] = 0x65; instr[3] = 0x08;
+ instr[4] = 0xeb; instr[5] = 0x4a; instr[6] = 0xfc;
+ regs.rip = (unsigned long)&instr[0];
+ load_egpr(18, (unsigned long)(res + 2));
+ rc = x86_emulate(&ctxt, &emulops);
+ if ( (rc != X86EMUL_OKAY) ||
+ (regs.rip != (unsigned long)&instr[7]) ||
+ (regs.r9 != 0x13253749) ||
+ (regs.rbx != 0x02030405) ||
+ ((regs.eflags & EFLAGS_MASK) !=
+ (EFLAGS_ALWAYS_SET | X86_EFLAGS_PF)) ||
+ (res[0] + 1) ||
+ (res[1] != 0x13253749) ||
+ (res[2] + 1) )
+ goto fail;
+
+ regs.rip = (unsigned long)&instr[0];
+ regs.r9 <<= 8;
+ rc = x86_emulate(&ctxt, &emulops);
+ if ( (rc != X86EMUL_OKAY) ||
+ (regs.rip != (unsigned long)&instr[7]) ||
+ (regs.r9 != 0x13253749) ||
+ (regs.rbx != 0x02030405) ||
+ ((regs.eflags & EFLAGS_MASK) !=
+ (EFLAGS_ALWAYS_SET | X86_EFLAGS(CF, SF))) ||
+ (res[0] + 1) ||
+ (res[1] != 0x15283b4e) ||
+ (res[2] + 1) )
+ goto fail;
+ printf("okay\n");
+ }
}
else
printf("skipped\n");
--- a/xen/arch/x86/x86_emulate/decode.c
+++ b/xen/arch/x86/x86_emulate/decode.c
@@ -1267,6 +1267,8 @@ decode_0f38(struct x86_emulate_state *s,
case X86EMUL_OPC_VEX_F2(0, 0xf7): /* shrx */
break;
+ case X86EMUL_OPC_EVEX_66(0, 0xe0) ...
+ X86EMUL_OPC_EVEX_66(0, 0xef): /* cmp<cc>xadd */
case X86EMUL_OPC_EVEX(0, 0xf2): /* andn */
case X86EMUL_OPC_EVEX(0, 0xf3): /* Grp 17 */
case X86EMUL_OPC_EVEX(0, 0xf5): /* bzhi */
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -7323,6 +7323,10 @@ x86_emulate(
#endif /* !X86EMUL_NO_SIMD */
+ case X86EMUL_OPC_EVEX_66(0x0f38, 0xe0) ...
+ X86EMUL_OPC_EVEX_66(0x0f38, 0xef): /* cmp<cc>xadd r,r,m */
+ generate_exception_if(evex.lr || evex.brs || evex.opmsk, X86_EXC_UD);
+ fallthrough;
case X86EMUL_OPC_VEX_66(0x0f38, 0xe0) ...
X86EMUL_OPC_VEX_66(0x0f38, 0xef): /* cmp<cc>xadd r,r,m */
generate_exception_if(!mode_64bit() || dst.type != OP_MEM || vex.l,
@@ -9355,6 +9359,7 @@ x86_emulate(
#undef rex_prefix
#undef lock_prefix
#undef vex
+#undef evex
#undef ea
int x86_emul_rmw(
@@ -9443,6 +9448,8 @@ int x86_emul_rmw(
pvex->b = 1;
pvex->r = 1;
pvex->reg = 0xf; /* rAX */
+ if ( s->promoted_evex )
+ pvex->opcx &= 7; /* See copy_VEX(). */
buf[3] = ctxt->opcode;
buf[4] = 0x11; /* reg=rDX r/m=(%RCX) */
place_ret(&buf[5]);
next prev parent reply other threads:[~2026-11-11 14:30 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-11 14:19 [PATCH 00/30] x86: permit guests to use APX Jan Beulich
2026-11-11 14:20 ` [PATCH 01/30] x86/CPUID: introduce APX_F Jan Beulich
2026-11-11 14:21 ` [PATCH 02/30] x86/CPUID: enable APX sub-leaf Jan Beulich
2026-11-11 14:21 ` [PATCH 03/30] x86/xstate: enable APX_F Jan Beulich
2026-11-11 14:22 ` [PATCH 04/30] x86emul: add eGPR parameter to decode_gpr() Jan Beulich
2026-11-11 14:22 ` [PATCH 05/30] x86emul: replace earlier relaxation of decode_gpr() Jan Beulich
2026-11-11 14:22 ` [PATCH 06/30] VMX: support APX Jan Beulich
2026-11-11 14:23 ` [PATCH 07/30] x86emul: latch XCR0 early during decode Jan Beulich
2026-11-11 14:23 ` [PATCH 08/30] x86emul: support REX2-prefixed insns Jan Beulich
2026-11-11 14:24 ` [PATCH 09/30] x86emul: APX_F REX2 testing Jan Beulich
2026-11-11 14:24 ` [PATCH 10/30] x86emul: support JMPABS Jan Beulich
2026-11-11 14:25 ` [PATCH 11/30] x86emul: switch to EVEX.R{3,4} nomenclature Jan Beulich
2026-11-11 14:25 ` [PATCH 12/30] x86emul: switch to EVEX.B{3,4} nomenclature Jan Beulich
2026-11-11 14:25 ` [PATCH 13/30] x86emul: switch to EVEX.X3 nomenclature Jan Beulich
2026-11-11 14:26 ` [PATCH 14/30] x86emul: support basic APX EVEX-encoded ALU insns Jan Beulich
2026-11-11 14:26 ` [PATCH 15/30] x86emul: support APX EVEX-encoded shift/rotate insns Jan Beulich
2026-11-11 14:27 ` [PATCH 16/30] x86emul: support remaining basic APX EVEX-Map4 insns Jan Beulich
2026-11-11 14:27 ` [PATCH 17/30] x86emul: support APX SCC insns Jan Beulich
2026-11-11 14:27 ` [PATCH 18/30] x86emul: support APX+ADX insns Jan Beulich
2026-11-11 14:28 ` [PATCH 19/30] x86emul: extend copy_VEX() for APX use Jan Beulich
2026-11-11 14:28 ` [PATCH 20/30] x86emul: support APX+AVX512 insns Jan Beulich
2026-11-11 14:29 ` [PATCH 21/30] x86emul: support APX+BMI1 insns Jan Beulich
2026-11-11 14:29 ` [PATCH 22/30] x86emul: support APX+BMI2 insns Jan Beulich
2026-11-11 14:29 ` Jan Beulich [this message]
2026-11-11 14:30 ` [PATCH 24/30] x86emul: support APX+{LZ,POP}CNT insns Jan Beulich
2026-11-11 14:30 ` [PATCH 25/30] x86emul: support APX+MOVBE insn Jan Beulich
2026-11-11 14:31 ` [PATCH 26/30] x86emul: support APX+MOVDIR/ENQCMD insns Jan Beulich
2026-11-11 14:31 ` [PATCH 27/30] x86emul: support APX+MOVRS insn Jan Beulich
2026-11-11 14:31 ` [PATCH 28/30] x86emul: support APX MSR access insns Jan Beulich
2026-11-11 14:32 ` [PATCH 29/30] x86: permit guests to use APX Jan Beulich
2026-11-11 14:33 ` [PATCH 30/30] x86emul: use latched XCR0 in x86emul_get_fpu() Jan Beulich
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