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Wed, 29 Jan 2025 06:03:42 +0000 (GMT) Message-ID: <3bf9f4e7-c091-4dc3-99a5-cac148efbead@linux.ibm.com> Date: Wed, 29 Jan 2025 11:33:40 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 14/15] target/ppc: Restrict ATTN / SCV / PMINSN helpers to TCG To: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , Richard Henderson , qemu-ppc@nongnu.org, Nicholas Piggin References: <20250127102620.39159-1-philmd@linaro.org> <20250127102620.39159-15-philmd@linaro.org> Content-Language: en-US From: Harsh Prateek Bora In-Reply-To: <20250127102620.39159-15-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: z1T0IuYWNAEycp1-Ky9vGo9N2jzX_jta X-Proofpoint-ORIG-GUID: RZBx-_uuu-d8zBwNI0bOCxeK5piW2tui X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-01-28_04,2025-01-27_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 spamscore=0 lowpriorityscore=0 mlxlogscore=571 bulkscore=0 impostorscore=0 priorityscore=1501 mlxscore=0 adultscore=0 malwarescore=0 suspectscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501290048 Received-SPF: pass client-ip=148.163.156.1; envelope-from=harshpb@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 1/27/25 15:56, Philippe Mathieu-Daudé wrote: > Move helper_attn(), helper_scv() and helper_pminsn() to > tcg-excp_helper.c. > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Harsh Prateek Bora > --- > target/ppc/excp_helper.c | 45 ------------------------------------ > target/ppc/tcg-excp_helper.c | 39 +++++++++++++++++++++++++++++++ > 2 files changed, 39 insertions(+), 45 deletions(-) > > diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c > index f0e734e1412..2deed155987 100644 > --- a/target/ppc/excp_helper.c > +++ b/target/ppc/excp_helper.c > @@ -400,21 +400,6 @@ static void powerpc_set_excp_state(PowerPCCPU *cpu, target_ulong vector, > env->reserve_addr = -1; > } > > -#ifdef CONFIG_TCG > -#if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY) > -void helper_attn(CPUPPCState *env) > -{ > - /* POWER attn is unprivileged when enabled by HID, otherwise illegal */ > - if ((*env->check_attn)(env)) { > - powerpc_checkstop(env, "host executed attn"); > - } else { > - raise_exception_err(env, POWERPC_EXCP_HV_EMU, > - POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); > - } > -} > -#endif > -#endif /* CONFIG_TCG */ > - > static void powerpc_mcheck_checkstop(CPUPPCState *env) > { > /* KVM guests always have MSR[ME] enabled */ > @@ -2445,36 +2430,6 @@ void helper_ppc_maybe_interrupt(CPUPPCState *env) > ppc_maybe_interrupt(env); > } > > -#ifdef TARGET_PPC64 > -void helper_scv(CPUPPCState *env, uint32_t lev) > -{ > - if (env->spr[SPR_FSCR] & (1ull << FSCR_SCV)) { > - raise_exception_err(env, POWERPC_EXCP_SYSCALL_VECTORED, lev); > - } else { > - raise_exception_err(env, POWERPC_EXCP_FU, FSCR_IC_SCV); > - } > -} > - > -void helper_pminsn(CPUPPCState *env, uint32_t insn) > -{ > - CPUState *cs = env_cpu(env); > - > - cs->halted = 1; > - > - /* Condition for waking up at 0x100 */ > - env->resume_as_sreset = (insn != PPC_PM_STOP) || > - (env->spr[SPR_PSSCR] & PSSCR_EC); > - > - /* HDECR is not to wake from PM state, it may have already fired */ > - if (env->resume_as_sreset) { > - PowerPCCPU *cpu = env_archcpu(env); > - ppc_set_irq(cpu, PPC_INTERRUPT_HDECR, 0); > - } > - > - ppc_maybe_interrupt(env); > -} > -#endif /* TARGET_PPC64 */ > - > static void do_rfi(CPUPPCState *env, target_ulong nip, target_ulong msr) > { > /* MSR:POW cannot be set by any form of rfi */ > diff --git a/target/ppc/tcg-excp_helper.c b/target/ppc/tcg-excp_helper.c > index 5ad39cacc92..4517b458b79 100644 > --- a/target/ppc/tcg-excp_helper.c > +++ b/target/ppc/tcg-excp_helper.c > @@ -499,6 +499,45 @@ void ppc_tcg_hv_emu(CPUPPCState *env, target_ulong *new_msr, > *new_msr |= env->msr & ((target_ulong)1 << MSR_RI); > } > > +void helper_attn(CPUPPCState *env) > +{ > + /* POWER attn is unprivileged when enabled by HID, otherwise illegal */ > + if ((*env->check_attn)(env)) { > + powerpc_checkstop(env, "host executed attn"); > + } else { > + raise_exception_err(env, POWERPC_EXCP_HV_EMU, > + POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); > + } > +} > + > +void helper_scv(CPUPPCState *env, uint32_t lev) > +{ > + if (env->spr[SPR_FSCR] & (1ull << FSCR_SCV)) { > + raise_exception_err(env, POWERPC_EXCP_SYSCALL_VECTORED, lev); > + } else { > + raise_exception_err(env, POWERPC_EXCP_FU, FSCR_IC_SCV); > + } > +} > + > +void helper_pminsn(CPUPPCState *env, uint32_t insn) > +{ > + CPUState *cs = env_cpu(env); > + > + cs->halted = 1; > + > + /* Condition for waking up at 0x100 */ > + env->resume_as_sreset = (insn != PPC_PM_STOP) || > + (env->spr[SPR_PSSCR] & PSSCR_EC); > + > + /* HDECR is not to wake from PM state, it may have already fired */ > + if (env->resume_as_sreset) { > + PowerPCCPU *cpu = env_archcpu(env); > + ppc_set_irq(cpu, PPC_INTERRUPT_HDECR, 0); > + } > + > + ppc_maybe_interrupt(env); > +} > + > #endif /* TARGET_PPC64 */ > > #endif /* !CONFIG_USER_ONLY */