From: Michael Ellerman <mpe@ellerman.id.au>
To: Ian Munsie <imunsie@au1.ibm.com>,
Michael Neuling <mikey@neuling.org>,
Frederic Barrat <fbarrat@linux.vnet.ibm.com>,
Andrew Donnellan <andrew.donnellan@au1.ibm.com>,
linuxppc-dev@lists.ozlabs.org, Huy Nguyen <huyn@mellanox.com>
Cc: Ian Munsie <imunsie@au1.ibm.com>
Subject: Re: [01/15] powerpc/powernv: Split cxl code out into a separate file
Date: Fri, 15 Jul 2016 20:53:08 +1000 (AEST) [thread overview]
Message-ID: <3rrTtr3fZ8z9sBg@ozlabs.org> (raw)
In-Reply-To: <1468444634-1866-2-git-send-email-imunsie@au.ibm.com>
On Wed, 2016-13-07 at 21:17:00 UTC, Ian Munsie wrote:
> From: Ian Munsie <imunsie@au1.ibm.com>
>
> The support for using the Mellanox CX4 in cxl mode will require
> additions to the PHB code. In preparation for this, move the existing
> cxl code out of pci-ioda.c into a separate pci-cxl.c file to keep things
> more organised.
>
> Signed-off-by: Ian Munsie <imunsie@au1.ibm.com>
> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
> Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/f456834a6c1db36c290fdfe8ab
cheers
next prev parent reply other threads:[~2016-07-15 10:53 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-13 21:16 [PATCH v3] powerpc / cxl: Add support for the Mellanox CX4 in cxl mode Ian Munsie
2016-07-13 21:17 ` [PATCH 01/15] powerpc/powernv: Split cxl code out into a separate file Ian Munsie
2016-07-15 10:53 ` Michael Ellerman [this message]
2016-07-13 21:17 ` [PATCH 02/15] cxl: Add cxl_slot_is_supported API Ian Munsie
2016-07-15 10:53 ` [02/15] " Michael Ellerman
2016-07-13 21:17 ` [PATCH 03/15] cxl: Enable bus mastering for devices using CAPP DMA mode Ian Munsie
2016-07-15 10:53 ` [03/15] " Michael Ellerman
2016-07-13 21:17 ` [PATCH 04/15] cxl: Move cxl_afu_get / cxl_afu_put to base Ian Munsie
2016-07-15 10:53 ` [04/15] " Michael Ellerman
2016-07-13 21:17 ` [PATCH 05/15] cxl: Allow a default context to be associated with an external pci_dev Ian Munsie
2016-07-15 10:53 ` [05/15] " Michael Ellerman
2016-07-13 21:17 ` [PATCH 06/15] cxl: Do not create vPHB if there are no AFU configuration records Ian Munsie
2016-07-15 10:53 ` [06/15] " Michael Ellerman
2016-07-13 21:17 ` [PATCH 07/15] powerpc/powernv: Add support for the cxl kernel api on the real phb Ian Munsie
2016-07-15 10:53 ` [07/15] " Michael Ellerman
2016-07-13 21:17 ` [PATCH 08/15] cxl: Add support for using the kernel API with a real PHB Ian Munsie
2016-07-15 10:53 ` [08/15] " Michael Ellerman
2016-07-13 21:17 ` [PATCH 09/15] cxl: Add kernel APIs to get & set the max irqs per context Ian Munsie
2016-07-15 10:53 ` [09/15] " Michael Ellerman
2016-07-13 21:17 ` [PATCH 10/15] cxl: Add preliminary workaround for CX4 interrupt limitation Ian Munsie
2016-07-15 10:53 ` [10/15] " Michael Ellerman
2016-07-13 21:17 ` [PATCH 11/15] cxl: Add support for interrupts on the Mellanox CX4 Ian Munsie
2016-07-14 5:34 ` Andrew Donnellan
2016-07-15 10:53 ` [11/15] " Michael Ellerman
2016-07-13 21:17 ` [PATCH 12/15] cxl: Workaround PE=0 hardware limitation in " Ian Munsie
2016-07-15 10:53 ` [12/15] " Michael Ellerman
2016-07-28 1:48 ` [PATCH 12/15] " Andrew Donnellan
2016-07-13 21:17 ` [PATCH 13/15] PCI/hotplug: pnv_php: export symbols and move struct types needed by cxl Ian Munsie
2016-07-15 10:53 ` [13/15] " Michael Ellerman
2016-07-13 21:17 ` [PATCH 14/15] PCI/hotplug: pnv_php: handle OPAL_PCI_SLOT_OFFLINE power state Ian Munsie
2016-07-15 10:53 ` [14/15] " Michael Ellerman
2016-07-13 21:17 ` [PATCH 15/15] cxl: Add cxl_check_and_switch_mode() API to switch bi-modal cards Ian Munsie
2016-07-15 10:53 ` [15/15] " Michael Ellerman
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