From: Michael Ellerman <patch-notifications@ellerman.id.au>
To: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>,
linuxppc-dev@lists.ozlabs.org,
Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Cc: Philippe Bergheaud <philippe.bergheaud@fr.ibm.com>,
Alastair D'Silva <alastair@linux.ibm.com>,
Vaibhav Jain <vaibhav@linux.vnet.ibm.com>,
Andrew Donnellan <andrew.donnellan@au1.ibm.com>,
Christophe Lombard <christophe_lombard@fr.ibm.com>
Subject: Re: cxl: Enable NORST bit in PSL_DEBUG register for PSL9
Date: Wed, 14 Mar 2018 20:27:43 +1100 (AEDT) [thread overview]
Message-ID: <401RG83Zrtz9sVP@ozlabs.org> (raw)
In-Reply-To: <20180209040916.14250-1-vaibhav@linux.vnet.ibm.com>
On Fri, 2018-02-09 at 04:09:16 UTC, Vaibhav Jain wrote:
> We enable the NORST bit by default for debug afu images to prevent
> reset of AFU trace-data on a PCI link drop. For production AFU images
> this bit is always ignored and PSL gets reconfigured anyways thereby
> resetting the trace data. So setting this bit for non-debug images
> doesn't have any impact.
>
> Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
> Reviewed-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
> Acked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/03ebb419b896e0fb2da3f34b57d45e
cheers
prev parent reply other threads:[~2018-03-14 9:27 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-09 4:09 [PATCH] cxl: Enable NORST bit in PSL_DEBUG register for PSL9 Vaibhav Jain
2018-02-09 8:25 ` christophe lombard
2018-02-09 14:56 ` Frederic Barrat
2018-02-13 2:55 ` Andrew Donnellan
2018-03-14 9:27 ` Michael Ellerman [this message]
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