[U-Boot-Users] waiting for timeouts in FPGA code?

[Steven Scholz <steven.scholz@imc-berlin.de>]

Hi there ,

in the U-Boot FPGA code timeouts are realized by

if (get_timer (ts) > CFG_FPGA_WAIT{_INIT})
	...

while CFG_FPGA_WAIT{_INIT} is supposed to be the timeout in milliseconds.
This does not work for the AT91RM9200. Instead of using

#define CFG_FPGA_WAIT 10

I have to use

#define CFG_FPGA_WAIT CFG_HZ/10

Is CFG_HZ defined for all other architectures?
Should we use CFG_HZ instead of hardcoded numbers?

Thanks.

-- 
Steven Scholz

imc Measurement & Control               imc Me?systeme GmbH
Voltastr. 5                             Voltastr. 5
13355 Berlin                            13355 Berlin
Germany                                 Deutschland