From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Subject: Re: [PATCH v2 2/3] arm64: dts: qcom: sm8450: add Soundwire and LPASS
Date: Tue, 15 Nov 2022 12:17:56 +0100 [thread overview]
Message-ID: <4045756e-eff8-bdbe-7165-e21d28504cab@linaro.org> (raw)
In-Reply-To: <20221115110053.110319-3-krzysztof.kozlowski@linaro.org>
On 15/11/2022 12:00, Krzysztof Kozlowski wrote:
> From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>
> Add Soundwire controllers, Low Power Audio SubSystem (LPASS) devices and
> LPASS pin controller.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> Co-developed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>
> ---
>
> Changes since v1:
> 1. Whitespace cleanups.
> 2. Correct include - do not use deprecated one.
> ---
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 295 +++++++++++++++++++++++++++
> 1 file changed, 295 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 4b0a1eee8bd9..e80a7d09646f 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -15,6 +15,7 @@
> #include <dt-bindings/interconnect/qcom,sm8450.h>
> #include <dt-bindings/soc/qcom,gpr.h>
> #include <dt-bindings/soc/qcom,rpmh-rsc.h>
> +#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
> #include <dt-bindings/thermal/thermal.h>
>
> / {
> @@ -2097,6 +2098,212 @@ compute-cb@3 {
> };
> };
>
> + wsa2macro: codec@31e0000 {
> + compatible = "qcom,sm8450-lpass-wsa-macro";
> + reg = <0 0x031e0000 0 0x1000>;
> + clocks = <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&vamacro>;
> + clock-names = "mclk", "npl", "macro", "dcodec", "fsgen";
> + assigned-clocks = <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
> + assigned-clock-rates = <19200000>, <19200000>;
> +
> + #clock-cells = <0>;
> + clock-output-names = "wsa2-mclk";
> + #sound-dai-cells = <1>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&wsa2_swr_active>;
> + };
> +
> + /* WSA2 */
> + swr4: soundwire-controller@31f0000 {
> + reg = <0 0x031f0000 0 0x2000>;
> + compatible = "qcom,soundwire-v1.7.0";
> + interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&wsa2macro>;
> + clock-names = "iface";
> +
> + qcom,din-ports = <2>;
> + qcom,dout-ports = <6>;
> +
> + qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x0f 0x0f>;
> + qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0c 0x06 0x12 0x0d 0x07 0x0a>;
> + qcom,ports-offset2 = /bits/ 8 <0xff 0x00 0x1f 0xff 0x00 0x1f 0x00 0x00>;
> + qcom,ports-hstart = /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF>;
> + qcom,ports-hstop = /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF>;
> + qcom,ports-word-length = /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF>;
> + qcom,ports-block-pack-mode = /bits/ 8 <0xFF 0xFF 0x01 0xFF 0xFF 0x01 0xFF 0xFF>;
> + qcom,ports-block-group-count = /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF>;
> + qcom,ports-lane-control = /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF>;
You didn't normalize the constants to be all-uppercase or all-lowercase.
I think lowercase is what's generally used in DTs.
The rest looks good though.
Konrad
> +
> + #sound-dai-cells = <1>;
> + #address-cells = <2>;
> + #size-cells = <0>;
> + };
> +
> + rxmacro: codec@3200000 {
> + compatible = "qcom,sm8450-lpass-rx-macro";
> + reg = <0 0x3200000 0 0x1000>;
> + clocks = <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&vamacro>;
> + clock-names = "mclk", "npl", "macro", "dcodec", "fsgen";
> +
> + assigned-clocks = <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
> + assigned-clock-rates = <19200000>, <19200000>;
> +
> + #clock-cells = <0>;
> + clock-output-names = "mclk";
> + #sound-dai-cells = <1>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&rx_swr_active>;
> + };
> +
> + swr1: soundwire-controller@3210000 {
> + reg = <0 0x3210000 0 0x2000>;
> + compatible = "qcom,soundwire-v1.7.0";
> + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&rxmacro>;
> + clock-names = "iface";
> + label = "RX";
> + qcom,din-ports = <0>;
> + qcom,dout-ports = <5>;
> +
> + qcom,ports-sinterval-low = /bits/ 8 <0x03 0x1F 0x1F 0x07 0x00>;
> + qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0B 0x01 0x00>;
> + qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0B 0x00 0x00>;
> + qcom,ports-hstart = /bits/ 8 <0xFF 0x03 0xFF 0xFF 0xFF>;
> + qcom,ports-hstop = /bits/ 8 <0xFF 0x06 0xFF 0xFF 0xFF>;
> + qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xFF 0xFF>;
> + qcom,ports-block-pack-mode = /bits/ 8 <0xFF 0x00 0x01 0xFF 0xFF>;
> + qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>;
> + qcom,ports-block-group-count = /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0x00>;
> + #sound-dai-cells = <1>;
> + #address-cells = <2>;
> + #size-cells = <0>;
> + };
> +
> + txmacro: codec@3220000 {
> + compatible = "qcom,sm8450-lpass-tx-macro";
> + reg = <0 0x3220000 0 0x1000>;
> + clocks = <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&vamacro>;
> + clock-names = "mclk", "npl", "macro", "dcodec", "fsgen";
> + assigned-clocks = <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
> + assigned-clock-rates = <19200000>, <19200000>;
> +
> + #clock-cells = <0>;
> + clock-output-names = "mclk";
> + #sound-dai-cells = <1>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&tx_swr_active>;
> + };
> +
> + wsamacro: codec@3240000 {
> + compatible = "qcom,sm8450-lpass-wsa-macro";
> + reg = <0 0x03240000 0 0x1000>;
> + clocks = <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&vamacro>;
> + clock-names = "mclk", "npl", "macro", "dcodec", "fsgen";
> +
> + assigned-clocks = <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
> + assigned-clock-rates = <19200000>, <19200000>;
> +
> + #clock-cells = <0>;
> + clock-output-names = "mclk";
> + #sound-dai-cells = <1>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&wsa_swr_active>;
> + };
> +
> + /* WSA */
> + swr0: soundwire-controller@3250000 {
> + reg = <0 0x03250000 0 0x2000>;
> + compatible = "qcom,soundwire-v1.7.0";
> + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&wsamacro>;
> + clock-names = "iface";
> +
> + qcom,din-ports = <2>;
> + qcom,dout-ports = <6>;
> +
> + qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x0f 0x0f>;
> + qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0c 0x06 0x12 0x0d 0x07 0x0a>;
> + qcom,ports-offset2 = /bits/ 8 <0xff 0x00 0x1f 0xff 0x00 0x1f 0x00 0x00>;
> + qcom,ports-hstart = /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF>;
> + qcom,ports-hstop = /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF>;
> + qcom,ports-word-length = /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF>;
> + qcom,ports-block-pack-mode = /bits/ 8 <0xFF 0xFF 0x01 0xFF 0xFF 0x01 0xFF 0xFF>;
> + qcom,ports-block-group-count = /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF>;
> + qcom,ports-lane-control = /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF>;
> + qcom,port-offset = <1>;
> + #sound-dai-cells = <1>;
> + #address-cells = <2>;
> + #size-cells = <0>;
> + };
> +
> + swr2: soundwire-controller@33b0000 {
> + reg = <0 0x33b0000 0 0x2000>;
> + compatible = "qcom,soundwire-v1.7.0";
> + interrupts-extended = <&intc GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>,
> + <&intc GIC_SPI 520 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "core", "wake";
> +
> + clocks = <&vamacro>;
> + clock-names = "iface";
> + label = "TX";
> +
> + qcom,din-ports = <4>;
> + qcom,dout-ports = <0>;
> + qcom,ports-sinterval-low = /bits/ 8 <0x01 0x01 0x03 0x03>;
> + qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x01 0x01>;
> + qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x00 0x00>;
> + qcom,ports-block-pack-mode = /bits/ 8 <0xFF 0xFF 0xFF 0xFF>;
> + qcom,ports-hstart = /bits/ 8 <0xFF 0xFF 0xFF 0xFF>;
> + qcom,ports-hstop = /bits/ 8 <0xFF 0xFF 0xFF 0xFF>;
> + qcom,ports-word-length = /bits/ 8 <0xFF 0xFF 0xFF 0xFF>;
> + qcom,ports-block-group-count = /bits/ 8 <0xFF 0xFF 0xFF 0xFF>;
> + qcom,ports-lane-control = /bits/ 8 <0x01 0x02 0x00 0x00>;
> + qcom,port-offset = <1>;
> + #sound-dai-cells = <1>;
> + #address-cells = <2>;
> + #size-cells = <0>;
> + };
> +
> + vamacro: codec@33f0000 {
> + compatible = "qcom,sm8450-lpass-va-macro";
> + reg = <0 0x033f0000 0 0x1000>;
> + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
> + clock-names = "mclk", "macro", "dcodec", "npl";
> + assigned-clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
> + assigned-clock-rates = <19200000>;
> +
> + #clock-cells = <0>;
> + clock-output-names = "fsgen";
> + #sound-dai-cells = <1>;
> + };
> +
> remoteproc_adsp: remoteproc@30000000 {
> compatible = "qcom,sm8450-adsp-pas";
> reg = <0 0x030000000 0 0x100>;
> @@ -3030,6 +3237,91 @@ qup_uart20_default: qup-uart20-default-state {
>
> };
>
> + lpass_tlmm: pinctrl@3440000{
> + compatible = "qcom,sm8450-lpass-lpi-pinctrl";
> + reg = <0 0x3440000 0x0 0x20000>,
> + <0 0x34d0000 0x0 0x10000>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + gpio-ranges = <&lpass_tlmm 0 0 23>;
> +
> + clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
> + clock-names = "core", "audio";
> +
> + wsa_swr_active: wsa-swr-active-state {
> + clk-pins {
> + pins = "gpio10";
> + function = "wsa_swr_clk";
> + drive-strength = <2>;
> + slew-rate = <1>;
> + bias-disable;
> + };
> +
> + data-pins {
> + pins = "gpio11";
> + function = "wsa_swr_data";
> + drive-strength = <2>;
> + slew-rate = <1>;
> + bias-bus-hold;
> + };
> + };
> +
> + tx_swr_active: tx-swr-active-state {
> + clk-pins {
> + pins = "gpio0";
> + function = "swr_tx_clk";
> + drive-strength = <2>;
> + slew-rate = <1>;
> + bias-disable;
> + };
> +
> + data-pins {
> + pins = "gpio1", "gpio2", "gpio14";
> + function = "swr_tx_data";
> + drive-strength = <2>;
> + slew-rate = <1>;
> + bias-bus-hold;
> + };
> + };
> +
> + rx_swr_active: rx-swr-active-state {
> + clk-pins {
> + pins = "gpio3";
> + function = "swr_rx_clk";
> + drive-strength = <2>;
> + slew-rate = <1>;
> + bias-disable;
> + };
> +
> + data-pins {
> + pins = "gpio4", "gpio5";
> + function = "swr_rx_data";
> + drive-strength = <2>;
> + slew-rate = <1>;
> + bias-bus-hold;
> + };
> + };
> +
> + wsa2_swr_active: wsa2-swr-active-state {
> + clk-pins {
> + pins = "gpio15";
> + function = "wsa2_swr_clk";
> + drive-strength = <2>;
> + slew-rate = <1>;
> + bias-disable;
> + };
> +
> + data-pins {
> + pins = "gpio16";
> + function = "wsa2_swr_data";
> + drive-strength = <2>;
> + slew-rate = <1>;
> + bias-bus-hold;
> + };
> + };
> + };
> +
> apps_smmu: iommu@15000000 {
> compatible = "qcom,sm8450-smmu-500", "arm,mmu-500";
> reg = <0 0x15000000 0 0x100000>;
> @@ -3507,6 +3799,9 @@ lpass_ag_noc: interconnect@3c40000 {
> };
> };
>
> + sound: sound {
> + };
> +
> thermal-zones {
> aoss0-thermal {
> polling-delay-passive = <0>;
next prev parent reply other threads:[~2022-11-15 11:20 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-15 11:00 [PATCH v2 0/3] arm64: dts: qcom: sm8450-hdk: add sound support Krzysztof Kozlowski
2022-11-15 11:00 ` [PATCH v2 1/3] arm64: dts: qcom: sm8450: add GPR node Krzysztof Kozlowski
2022-11-15 11:02 ` Konrad Dybcio
2022-11-15 11:00 ` [PATCH v2 2/3] arm64: dts: qcom: sm8450: add Soundwire and LPASS Krzysztof Kozlowski
2022-11-15 11:17 ` Konrad Dybcio [this message]
2022-11-15 11:19 ` Krzysztof Kozlowski
2022-11-15 11:00 ` [PATCH v2 3/3] arm64: dts: qcom: sm8450-hdk: add sound support Krzysztof Kozlowski
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4045756e-eff8-bdbe-7165-e21d28504cab@linaro.org \
--to=konrad.dybcio@linaro.org \
--cc=agross@kernel.org \
--cc=andersson@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=krzysztof.kozlowski@linaro.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=robh+dt@kernel.org \
--cc=srinivas.kandagatla@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.