[PATCH] a better Silicon Image SATA mod15 write fix?

[Jeff Garzik <jgarzik@pobox.com>]

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Anyone with a Silicon Image controller interested in testing this patch 
on a non-production box?

It adds support for a new, Silicon Image-specific DMA table which should 
not only reduce CPU utilization a bit, but hopefully also magically 
solve the "mod15write bug" that affected Silicon Image chipsets _when in 
combination with_ certain SATA drives.

Feedback from people with and without the affected SATA drives 
("mod15write" bug) is welcome.

This patch should apply against the latest 2.6.4-bkN snapshot version of 
sata_sil.c, but for ease I have attached the full 2.6 version of the 
driver as well (compressed, it's just over 4K).

	Jeff




[-- Attachment #2: patch --]
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===== drivers/scsi/sata_sil.c 1.14 vs edited =====
--- 1.14/drivers/scsi/sata_sil.c	Sun Mar 14 23:32:15 2004
+++ edited/drivers/scsi/sata_sil.c	Mon Mar 15 10:20:43 2004
@@ -52,12 +52,12 @@
 
 	SIL_IDE0_TF		= 0x80,
 	SIL_IDE0_CTL		= 0x8A,
-	SIL_IDE0_BMDMA		= 0x00,
+	SIL_IDE0_BMDMA		= 0x10,
 	SIL_IDE0_SCR		= 0x100,
 
 	SIL_IDE1_TF		= 0xC0,
 	SIL_IDE1_CTL		= 0xCA,
-	SIL_IDE1_BMDMA		= 0x08,
+	SIL_IDE1_BMDMA		= 0x18,
 	SIL_IDE1_SCR		= 0x180,
 
 	SIL_IDE2_TF		= 0x280,
@@ -71,7 +71,6 @@
 	SIL_IDE3_BMDMA		= 0x208,
 	SIL_IDE3_SCR		= 0x380,
 
-	SIL_QUIRK_MOD15WRITE	= (1 << 0),
 	SIL_QUIRK_UDMA5MAX	= (1 << 1),
 };
 
@@ -79,6 +78,7 @@
 static void sil_dev_config(struct ata_port *ap, struct ata_device *dev);
 static u32 sil_scr_read (struct ata_port *ap, unsigned int sc_reg);
 static void sil_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
+static void sil_fill_sg(struct ata_queued_cmd *qc);
 
 static struct pci_device_id sil_pci_tbl[] = {
 	{ 0x1095, 0x3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 },
@@ -94,17 +94,6 @@
 	const char * product;
 	unsigned int quirk;
 } sil_blacklist [] = {
-	{ "ST320012AS",		SIL_QUIRK_MOD15WRITE },
-	{ "ST330013AS",		SIL_QUIRK_MOD15WRITE },
-	{ "ST340017AS",		SIL_QUIRK_MOD15WRITE },
-	{ "ST360015AS",		SIL_QUIRK_MOD15WRITE },
-	{ "ST380023AS",		SIL_QUIRK_MOD15WRITE },
-	{ "ST3120023AS",	SIL_QUIRK_MOD15WRITE },
-	{ "ST340014ASL",	SIL_QUIRK_MOD15WRITE },
-	{ "ST360014ASL",	SIL_QUIRK_MOD15WRITE },
-	{ "ST380011ASL",	SIL_QUIRK_MOD15WRITE },
-	{ "ST3120022ASL",	SIL_QUIRK_MOD15WRITE },
-	{ "ST3160021ASL",	SIL_QUIRK_MOD15WRITE },
 	{ "Maxtor 4D060H3",	SIL_QUIRK_UDMA5MAX },
 	{ }
 };
@@ -123,13 +112,13 @@
 	.eh_strategy_handler	= ata_scsi_error,
 	.can_queue		= ATA_DEF_QUEUE,
 	.this_id		= ATA_SHT_THIS_ID,
-	.sg_tablesize		= LIBATA_MAX_PRD,
+	.sg_tablesize		= 256,
 	.max_sectors		= ATA_MAX_SECTORS,
 	.cmd_per_lun		= ATA_SHT_CMD_PER_LUN,
 	.emulated		= ATA_SHT_EMULATED,
-	.use_clustering		= ATA_SHT_USE_CLUSTERING,
+	.use_clustering		= 1,
 	.proc_name		= DRV_NAME,
-	.dma_boundary		= ATA_DMA_BOUNDARY,
+	.dma_boundary		= 0xffffffff,
 	.slave_configure	= ata_scsi_slave_config,
 	.bios_param		= ata_std_bios_param,
 };
@@ -144,7 +133,7 @@
 	.phy_reset		= sata_phy_reset,
 	.phy_config		= pata_phy_config,	/* not a typo */
 	.bmdma_start            = ata_bmdma_start_mmio,
-	.fill_sg		= ata_fill_sg,
+	.fill_sg		= sil_fill_sg,
 	.eng_timeout		= ata_eng_timeout,
 	.irq_handler		= ata_interrupt,
 	.scr_read		= sil_scr_read,
@@ -212,6 +201,27 @@
 		writel(val, mmio);
 }
 
+static void sil_fill_sg(struct ata_queued_cmd *qc)
+{
+	struct ata_port *ap = qc->ap;
+	unsigned int idx, n_elem = qc->n_elem;
+	struct scatterlist *sg = qc->sg;
+
+	for (idx = 0; idx < n_elem; idx++, sg++) {
+		u32 addr;
+		u32 size;
+
+		addr = (u32) sg_dma_address(sg);
+		size = (u32) sg_dma_len(sg);
+		size &= ~ATA_PRD_EOT;
+		if (idx == (n_elem - 1))
+			size |= ATA_PRD_EOT;
+
+		ap->prd[idx].addr = cpu_to_le32(addr);
+		ap->prd[idx].flags_len = cpu_to_le32(size);
+	}
+}
+
 /**
  *	sil_dev_config - Apply device/host-specific errata fixups
  *	@ap: Port containing device to be examined
@@ -258,15 +268,6 @@
 			break;
 		}
 	
-	/* limit requests to 15 sectors */
-	if (quirks & SIL_QUIRK_MOD15WRITE) {
-		printk(KERN_INFO "ata%u(%u): applying Seagate errata fix\n",
-		       ap->id, dev->devno);
-		ap->host->max_sectors = 15;
-		ap->host->hostt->max_sectors = 15;
-		return;
-	}
-
 	/* limit to udma5 */
 	if (quirks & SIL_QUIRK_UDMA5MAX) {
 		printk(KERN_INFO "ata%u(%u): applying Maxtor errata fix %s\n",

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