Re: [PATCH] libata atapi work #5

[Jeff Garzik <jgarzik@pobox.com>]

Pat LaVarre wrote:
> Jeff G:
> 
> 
>>an open IP core 
>>compliant to the AHCI specification:
>>http://www.intel.com/technology/serialata/pdf/rev1_0.pdf
> 
> 
> Does the web now offer PCI chip designs in open source?

Yes.  http://www.opencores.org/projects.cgi/web/pci

The above IP core bridges from the PCI bus to the internal wishbone [IP 
core interconnect] bus.

In theory, you connect your AHCI IP core to the PCI IP core via 
wishbone.  opencores.org also has a wishbone-compliant DMA engine.


> 1987..1990 or so I did register-transfer-level chip design (a la
> Verilog).  I naturally prefer concurrent designs over sequential.

All good EE designs are concurrent rather than sequential ;-)

But I'm a computer scientist, what do I know...

	Jeff