From: Andrew Lunn <andrew@lunn.ch>
To: Thangaraj Samynathan <thangaraj.s@microchip.com>
Cc: netdev@vger.kernel.org, andrew+netdev@lunn.ch,
davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
pabeni@redhat.com, bryan.whitehead@microchip.com,
UNGLinuxDriver@microchip.com, linux@armlinux.org.uk,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 3/5] net: lan743x: Add support to software-nodes for SFP
Date: Thu, 14 May 2026 14:57:31 +0200 [thread overview]
Message-ID: <40f567f0-e6eb-434f-9d54-7f226f0f70fb@lunn.ch> (raw)
In-Reply-To: <20260514105028.42942-4-thangaraj.s@microchip.com>
> +#define PCI11X1X_TX_FAULT_GPIO 46
> +#define PCI11X1X_TX_DIS_GPIO 47
> +#define PCI11X1X_RATE_SEL0_GPIO 48
> +#define PCI11X1X_LOS_GPIO 49
> +#define PCI11X1X_MOD_DEF0_GPIO 51
How do you know these values?
Can i buy this device, design my own board, and decide to use a
different mapping of GPIO pins to SFP cage pins? Or does the data
sheet say you MUST use this mapping?
Maybe consider drivers/misc/lan966x_pci.dtso.
Andrew
next prev parent reply other threads:[~2026-05-14 12:57 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-14 10:50 [PATCH v4 0/5] net: lan743x: Add SFP support for PCI11x1x Thangaraj Samynathan
2026-05-14 10:50 ` [PATCH v4 1/5] net: lan743x: rename is_sgmii_en to is_pcs_en Thangaraj Samynathan
2026-05-14 12:38 ` Andrew Lunn
2026-05-14 10:50 ` [PATCH v4 2/5] net: lan743x: read SFP straps from PCI11x1x device Thangaraj Samynathan
2026-05-14 12:47 ` Andrew Lunn
2026-05-14 10:50 ` [PATCH v4 3/5] net: lan743x: Add support to software-nodes for SFP Thangaraj Samynathan
2026-05-14 12:57 ` Andrew Lunn [this message]
2026-05-14 13:02 ` Andrew Lunn
2026-05-14 10:50 ` [PATCH v4 4/5] net: lan743x: Register SFP platform device for PCI11x1x Thangaraj Samynathan
2026-05-14 10:50 ` [PATCH v4 5/5] net: lan743x: Add PCS/XPCS support for SFP on PCI11x1x Thangaraj Samynathan
2026-05-14 13:16 ` Andrew Lunn
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