Re: [Qemu-devel] [patch] performance improvement (softmmu, x86, GCC 3)

[Fabrice Bellard <fabrice@bellard.org>]

I am trying your patch and will include it if no performance loss on my 
benchmarks with gcc 3.2.

BTW, it could be possible to go a little faster by coding in assembler 
the unaligned access case of the C helpers which are called by the 
inline functions in softmmu_header.h.

Fabrice.

Piotr Krysik wrote:
> Hi!
> 
> I'm attaching a small patch to enable assembly 
> implementation of ld, lds and st (from 
> softmmu_header.h) for GCC 3.3 and GCC 3.4 when 
> running softmmu x86 guest on x86 host.
> 
> With my simple benchmark (dd if=/dev/zero bs=1M 
> count=16 | gzip -9 on Linux guest) this patch 
> improves performance by about 8% (QEMU compiled 
> with GCC 3.3 on Pentium II Debian host).
> 
> 
> Regards,
> 
> Piotrek
> 
> 
> PS. I also considered removing "%ecx" from register 
> constraints of st (softmmu_header.h, line 224) and 
> explicitly saving ecx before calling __st (line 198), 
> but performance gain was much smaller. I suspect that 
> gcse optimization and asm blocks under GCC 3.3 and 
> GCC 3.4 don't mix well in QEMU.
> 
> 
> 
> 		
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> 
> ------------------------------------------------------------------------
> 
> diff -ru qemu-0.6.0/Makefile.target qemu-0.6.0-gcc3/Makefile.target
> --- qemu-0.6.0/Makefile.target	2004-07-10 20:20:09.000000000 +0200
> +++ qemu-0.6.0-gcc3/Makefile.target	2004-07-28 13:05:31.000000000 +0200
> @@ -73,7 +73,7 @@
>  CFLAGS+=-fomit-frame-pointer
>  OP_CFLAGS=$(CFLAGS) -mpreferred-stack-boundary=2
>  ifeq ($(HAVE_GCC3_OPTIONS),yes)
> -OP_CFLAGS+= -falign-functions=0
> +OP_CFLAGS+= -falign-functions=0 -fno-gcse
>  else
>  OP_CFLAGS+= -malign-functions=0
>  endif
> diff -ru qemu-0.6.0/target-i386/op.c qemu-0.6.0-gcc3/target-i386/op.c
> --- qemu-0.6.0/target-i386/op.c	2004-07-10 20:20:09.000000000 +0200
> +++ qemu-0.6.0-gcc3/target-i386/op.c	2004-07-28 13:08:00.000000000 +0200
> @@ -20,11 +20,9 @@
>  
>  /* XXX: must use this define because the soft mmu macros have huge
>     register constraints so they cannot be used in any C code. gcc 3.3
> -   does not seem to be able to handle some constraints in rol
> -   operations, so we disable it. */
> -#if !(__GNUC__ == 3 && __GNUC_MINOR__ == 3)
> +   does not seem to be able to handle some constraints in rol unless we
> +   disable gcse optimization. */
>  #define ASM_SOFTMMU
> -#endif
>  #include "exec.h"
>  
>  /* n must be a constant to be efficient */
> 
> 
> ------------------------------------------------------------------------
> 
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