Re: [patch 3/6] Walnut DTS

[Segher Boessenkool <segher@kernel.crashing.org>]

>> Hrm.. I'm still slightly uneasy though.  In my Ebony device tree, the
>> POB's ranges exists to embed the 32-bit OPB space into the 64-bit PLB
>> space by tacking on a 0x1 in bits 32:35.  In your 405gp ranges, you're
>> describing just the address range used by OPB peripherals
>> (0xef600000-0xf0000000) as residing at address 0 in OPB-space.
>>
>> Since the ranges will still generate the right physical addresses, I
>> guess it doesn't matter.  But I'm not sure it meets the principle of
>> least surprise - since I think the documentation generally talks as
>> though addresses on the 405 OPB bus are identical to addreses on the
>> PLB.
>
> I don't care either way.  If I remember correctly, this way of doing it
> came out of a discussion with Segher.

I don't think I ever said that this is a better way of doing things --
then again, I change my mind now and then.

Someone needs to write down a proposed device binding for these busses,
and then we can really discuss things ;-)


Segher