From: Jeff Garzik <jgarzik@pobox.com>
To: Zwane Mwaikambo <zwane@fsmlabs.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>,
linux-kernel@vger.kernel.org, asit.k.mallick@intel.com
Subject: Re: [Patch 0/2] Disable SW irqbalance/irqaffinity for E7520/E7320/E7525
Date: Fri, 24 Sep 2004 16:24:47 -0400 [thread overview]
Message-ID: <4154828F.6090205@pobox.com> (raw)
In-Reply-To: <Pine.LNX.4.53.0409241805020.2791@musoma.fsmlabs.com>
Zwane Mwaikambo wrote:
> On Thu, 23 Sep 2004, Suresh Siddha wrote:
>
>
>>As part of the workaround for the "Interrupt message re-ordering across
>>hub interface" errata (page #16 in
>>http://developer.intel.com/design/chipsets/specupdt/30288402.pdf),
>>BIOS may enable hardware IRQ balancing for Lindenhurst/Tumwater based chipset
>>platforms. Software based irq_balance/irq_affinity should be disabled if
>>hardware IRQ balancing is enabled.
>
>
> Can we avoid those tests? Like not starting the irq balancer code at all
> with those chipsets?
That's my preference.
Or, compile with !CONFIG_KIRQD -- the recommended setting for modern
distros, since irqbalanced(1) is shipped.
Jeff
next prev parent reply other threads:[~2004-09-24 20:25 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-09-24 6:34 [Patch 0/2] Disable SW irqbalance/irqaffinity for E7520/E7320/E7525 Suresh Siddha
2004-09-24 15:05 ` Zwane Mwaikambo
2004-09-24 20:24 ` Jeff Garzik [this message]
2004-09-24 22:20 ` Suresh Siddha
2004-09-25 9:15 ` Zwane Mwaikambo
2004-09-27 18:03 ` Suresh Siddha
2004-09-28 21:11 ` Suresh Siddha
2004-09-29 15:16 ` Zwane Mwaikambo
2004-09-30 22:51 ` Andrew Morton
2004-10-01 1:15 ` Suresh Siddha
2004-09-29 13:36 ` Zwane Mwaikambo
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