Re: [Qemu-devel] enabling bus-master IDE driver

[Jason Brittain <jason@brittainweb.org>]

Juergen Keil wrote:
> 
>>I just pulled the latest source from CVS (today's), and tried
>>looking at DMA again.
>>
>>Host: Linux 2.6 (Fedora Core 2)
>>Guest: XP corp.
>>It still says the primary IDE channel is in PIO mode, and
>>doesn't seem any faster.
> 
> 
> I guess Windows 2000/XP is confused about the fact that a qemu hdd now
> supports ultra dma modes, but no multiword dma modes.  Maybe the windows
> ata driver gives up on dma as soon as it notices that the hdd drive does
> not support any multiword dma modes?
> 
> Try to add a "put_le16(p + 63, 0x07);" to hw/ide.c ide_identify() and
> ide_atapi_identify().  This announces support for multiword dma modes 0-2.
> This change appears to enable DMA on Win 2000.
> 
> 
> I'm currently using the following changes (note: this diff is against the
> previous version of ide.c, qemu-cvs already contains a few of these changes),
> and seem to get DMA with Win ME, Win 2000 and Solaris x86.
> 
> 
> Index: hw/ide.c
> ===================================================================
> RCS file: /cvsroot/qemu/qemu/hw/ide.c,v
> retrieving revision 1.28
> diff -u -B -r1.28 ide.c
> --- hw/ide.c    9 Oct 2004 20:27:55 -0000       1.28
> +++ hw/ide.c    12 Nov 2004 14:15:25 -0000
> @@ -416,10 +416,10 @@
>      put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS);
>  #endif
>      put_le16(p + 48, 1); /* dword I/O */
> -    put_le16(p + 49, 1 << 9); /* LBA supported, no DMA */
> +    put_le16(p + 49, 1 << 8 | 1 << 9); /* DMA and LBA supported */
>      put_le16(p + 51, 0x200); /* PIO transfer cycle */
>      put_le16(p + 52, 0x200); /* DMA transfer cycle */
> -    put_le16(p + 53, 1); /* words 54-58 are valid */
> +    put_le16(p + 53, 1 | 1 << 2); /* words 54-58,88 are valid */
>      put_le16(p + 54, s->cylinders);
>      put_le16(p + 55, s->heads);
>      put_le16(p + 56, s->sectors);
> @@ -430,6 +430,8 @@
>          put_le16(p + 59, 0x100 | s->mult_sectors);
>      put_le16(p + 60, s->nb_sectors);
>      put_le16(p + 61, s->nb_sectors >> 16);
> +    put_le16(p + 63, 0x07 /*| 0x4 << 8*/); /* Multiword DMA supported/selected 
> */
> +    put_le16(p + 64, 0x3f); /* PIO modes supported */
>      put_le16(p + 80, (1 << 1) | (1 << 2));
>      put_le16(p + 82, (1 << 14));
>      put_le16(p + 83, (1 << 14));
> @@ -437,6 +439,8 @@
>      put_le16(p + 85, (1 << 14));
>      put_le16(p + 86, 0);
>      put_le16(p + 87, (1 << 14));
> +    put_le16(p + 88, 0x3f | 0x20 << 8); /* UltraDMA modes supported/selected */
> +    put_le16(p + 93, 1 | (1 << 1) | (1 << 3) | (1 << 13) | (1 << 14));
>  }
>  
>  static void ide_atapi_identify(IDEState *s)
> @@ -456,10 +460,10 @@
>      padstr((uint8_t *)(p + 23), QEMU_VERSION, 8); /* firmware version */
>      padstr((uint8_t *)(p + 27), "QEMU CD-ROM", 40); /* model */
>      put_le16(p + 48, 1); /* dword I/O (XXX: should not be set on CDROM) */
> -    put_le16(p + 49, 1 << 9); /* LBA supported, no DMA */
> -    put_le16(p + 53, 3); /* words 64-70, 54-58 valid */
> -    put_le16(p + 63, 0x103); /* DMA modes XXX: may be incorrect */
> -    put_le16(p + 64, 1); /* PIO modes */
> +    put_le16(p + 49, 1 << 8 | 1 << 9); /* DMA and LBA supported */
> +    put_le16(p + 53, 7); /* words 64-70, 54-58, 88 valid */
> +    put_le16(p + 63, 0x07 /*| 0x4 << 8*/); /* Multiword DMA supported/selected 
> */
> +    put_le16(p + 64, 0x3f); /* PIO modes supported */
>      put_le16(p + 65, 0xb4); /* minimum DMA multiword tx cycle time */
>      put_le16(p + 66, 0xb4); /* recommended DMA multiword tx cycle time */
>      put_le16(p + 67, 0x12c); /* minimum PIO cycle time without flow control */
> @@ -469,6 +473,7 @@
>      put_le16(p + 72, 30); /* in ns */
>  
>      put_le16(p + 80, 0x1e); /* support up to ATA/ATAPI-4 */
> +    put_le16(p + 88, 0x3f | 0x20 << 8); /* UltraDMA modes supported/selected */
>  }
>  
>  static void ide_set_signature(IDEState *s)
> @@ -498,6 +503,10 @@
>  static inline void ide_set_irq(IDEState *s)
>  {
>      if (!(s->cmd & IDE_CMD_DISABLE_IRQ)) {
> +       BMDMAState *bm = s->bmdma;
> +       if(bm)
> +           bm->status |= BM_STATUS_INT;
> +
>  #ifdef TARGET_PPC
>          if (s->openpic) 
>              openpic_set_irq(s->openpic, s->irq, 1);
> @@ -1560,7 +1569,7 @@
>              case 0x82: /* write cache disable */
>              case 0xaa: /* read look-ahead enable */
>              case 0x55: /* read look-ahead disable */
> -                s->status = READY_STAT;
> +                s->status = READY_STAT | SEEK_STAT;
>                  ide_set_irq(s);
>                  break;
>              default:
> @@ -2174,6 +2183,7 @@
>      pci_conf[0x01] = 0x80;
>      pci_conf[0x02] = 0x10;
>      pci_conf[0x03] = 0x70;
> +    pci_conf[0x09] = 0x8a; // programming interface = PCI_IDE bus master is 
> supported
>      pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE
>      pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
>      pci_conf[0x0e] = 0x00; // header_type

This is interesting..

I carefully applied these changes to my ide.c and retried:

Host: Linux 2.6 (Fedora Core 2)
Guest: XP corp.
It now says "Current Transfer Mode: Multi-Word DMA Mode 2".
I'm not real sure how I test to see if disk access is faster,
or by how much, but this appears to be progress for XP.

Host: Linux 2.6 (Fedora Core 2)
Guest: Linux 2.6
Upon boot I used hdparm to show the settings for /dev/hda.  It
said that DMA was on.  So I did some hdparm -t /dev/hda timings.
It is now half the speed it was when I used the source from CVS
HEAD (~25MB/s now, compared with ~45MB/s when I tested CVS HEAD).
I used hdparm to turn off DMA, and to list the settings again
to verify the change took affect.  Then I did more hdparm -t
timings.  Transfer rate went down to 10MB/s.  Turning it back on
with hdparm brings it back up to ~25MB/s.  So, compared with
what's in CVS HEAD, this appears significantly slower for Linux.

-- 
Jason Brittain