Re: mv643xx_eth SA_SHIRQ support patch

["Mark A. Greer" <mgreer@mvista.com>]

Sven Luther wrote:

>Also going to add the explicit detection of the marvell bridge in the OF tree,
>

Do you really need to do that, though?  Just finding "Pegasos" or 
"Pegasos2" in the 'model' field of the device tree should be sufficient, 
shouldn't it? (if I'm reading the code correctly)

>but need to decide what to check for there.
>

The only way that I know of to tell if you're on a mv64x60 bridge is to 
do a pci cfg read of the vendor/device id fields of fcn 0 of the 
bridge's device on that pci hose.  By default, the bus number of both 
hoses are 0 (but OF probably sets the second one to be > 0 depending on 
how many pci buses there are hanging off hose 0), the bridge will be 
device 0 on both hoses, the vendor id will be PCI_VENDOR_ID_MARVELL 
(0x11ab) and the device id will be PCI_DEVICE_ID_MARVELL_MV64360 
(0x6460) for a mv64360.

Unfortunately, the bus number of each hose, the device # of the bridge's 
device on that hose (see "PCI P2P Configuration" register offsets 0x1d14 
& 0x1d94), and the vendor & device ids (by a pci cfg write to those 
fields) can all be changed by the fw .  I guess the device tree tells 
you the bus number of each hose so you can generate the proper cfg 
access and I doubt OF changes the bridge's device # and pci vendor/dev 
id but I wanted to make you aware of the potential.

Mark