From: Jeff Garzik <jgarzik@pobox.com>
To: Michael Chan <mchan@broadcom.com>
Cc: "David S. Miller" <davem@davemloft.net>, netdev@oss.sgi.com
Subject: Re: [PATCH 2.6.11 5/8] tg3: Add unstable PLL workaround for 5750
Date: Tue, 22 Mar 2005 15:58:19 -0500 [thread overview]
Message-ID: <424086EB.50302@pobox.com> (raw)
In-Reply-To: <B1508D50A0692F42B217C22C02D84972020F3E25@NT-IRVA-0741.brcm.ad.broadcom.com>
Michael Chan wrote:
> Add unstable PLL clock workaround for 5750 Ax and Bx devices. The workaround
> code is run just before entering D3hot state.
>
> Signed-off-by: Michael Chan <mchan@broadcom.com
ACK
next prev parent reply other threads:[~2005-03-22 20:58 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-03-21 7:48 [PATCH 2.6.11 5/8] tg3: Add unstable PLL workaround for 5750 Michael Chan
2005-03-22 20:58 ` Jeff Garzik [this message]
2005-03-23 19:09 ` David S. Miller
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