All of lore.kernel.org
 help / color / mirror / Atom feed
From: William J Beksi <wjbeksi@setabox.com>
To: m.mikolaiczyk@rac.de
Cc: linux-mtd@lists.infradead.org
Subject: Re: NAND connected with address lines based example
Date: Thu, 31 Mar 2005 17:48:26 +0800	[thread overview]
Message-ID: <424BC76A.7070808@setabox.com> (raw)
In-Reply-To: <424BBDE3.4000506@rac.de>

Hi Marcus,

Marcus Mikolaiczyk wrote:
> Dear list users,
> 
> I got a system where a Samsung NAND ist connect  via Adresslines (A0 ->
> CLE, A1 -> ALE) using a chipselect from the processor. I looked through
> the guide "MTD NAND Driver Programming Interface" and the sources to
> adapt an existing driver. Now I stuck with a problem concerning the
> board_hwcontrol function.
> It's alwas there that CLE/ALE have a set and a clear command. But in my
> setup the CLE/ALE setting is made through the access of the
> addresslines. See the table:
> 
>         A1(ALE)   A0(CLE)  Beispieladresse    Funktion
> -------------------------------------------------------------------------------
> 1         0         0       0xA8000000        read/write access on mem
> 2         0         1       0xA8000001        Command
> 3         1         0       0xA8000002        Addresssetting
> 4         1         1       0xA8000003        not valid
> 
> The base is A8000000 for example.
> Now writing a Byte to 0xA8000001 (a NAND command) automatically sets ALE
> =0 and CLE=1
> Writing the addressparts is done through writing the 1st databyte Col1
> to address 0xA8000002 and so on.
> Concerning now the function board_hwcontrol there is the
> ...
> switch(cmd) {
> 		case NAND_CTL_SETCLE: /* Write to addr 0xA8000001 */;break;
> 		case NAND_CTL_CLRCLE: /* do nothing */;break;
> 		case NAND_CTL_SETALE: /* Write to addr 0xA8000002 */;break;
> 		case NAND_CTL_CLRALE: /* do nothing */;break;
> }
> ...
> Am I right when these commands have to be empty in this case?
> Where do I tell the system to use the address 0xA8000001 for commands
> and 0xA8000002 for addresses?

You can write your hardware control function like this:

switch(cmd) {
	case NAND_CTL_SETCLE: this->IO_ADDR_W = io_base_addr+1; break;
	case NAND_CTL_CLRCLE: this->IO_ADDR_W = io_base_addr; break;
	case NAND_CTL_SETALE: this->IO_ADDR_W = io_base_addr+2; break;	
	case NAND_CTL_CLRALE: this->IO_ADDR_W = io_base_addr; break;
}

Where io_base_addr = A8000000, your base address.

Hope this helps.
-- 
William J Beksi                          <wjbeksi@users.sourceforge.net>
GPG Key Fingerprint = ED4B 32C3 69E6 C2B7 705C  263F CB2F 3253 E7E1 DB3B

  reply	other threads:[~2005-03-31  9:48 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-03-31  9:07 NAND connected with address lines based example Marcus Mikolaiczyk
2005-03-31  9:48 ` William J Beksi [this message]
2005-03-31  9:58   ` Marcus Mikolaiczyk
2005-03-31  9:54 ` Pathompong Puengrostham
2005-03-31 10:53 ` Thomas Gleixner

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=424BC76A.7070808@setabox.com \
    --to=wjbeksi@setabox.com \
    --cc=linux-mtd@lists.infradead.org \
    --cc=m.mikolaiczyk@rac.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.