[U-Boot-Users] Query related to POST of SDRAM

[Jerry Van Baren <gerald.vanbaren@smiths-aerospace.com>]

Vikrant_Basotra wrote:
> Hi All,
> 	In file post/memeory.c the following comment is there
> /*
>  * This is 64 bit wide test patterns.  Note that they reside in ROM
>  * (which presumably works) and the tests write them to RAM which may
>  * not work.
>  *
>  * The "otherpattern" is written to drive the data bus to values other
>  * than the test pattern.  This is for detecting floating bus lines.
> *
> */
> This comment gives an hint that this code is specifically for the 64 bit
> wide SDRAM only.
> I ran the same code on the ep8248 board in which the port size of the RAM is
> 32 bits it worked there, didn't throw any error.
> I just want to make it sure that, if the port size of the RAM is 32 bits
> will this test work with out any modifications or  do I have to make some
> changes.
> 
> Regards,
> Vikrant

Confirmed: the processor in hardware does the size translation between 
the register load/store size (64 bits) and the memory bus (could be 
8/16/32/64 bits in various processors and configurations) by doing 
multiple bus cycles as necessary.

The intent of using 64 bit transactions is to stress the bus and use all 
of the bus bits when running a 64 bit wide bus.

gvb