From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.dev.rtsoft.ru (RT-soft-2.Moscow.itn.ru [80.240.96.70]) by ozlabs.org (Postfix) with SMTP id 018A767B38 for ; Fri, 6 May 2005 19:09:59 +1000 (EST) Message-ID: <427B3465.1070502@ru.mvista.com> Date: Fri, 06 May 2005 13:09:57 +0400 From: Vitaly Bordug MIME-Version: 1.0 To: Eugene Surovegin References: <427B22A0.8010704@ru.mvista.com> <20050506081805.GA19401@gate.ebshome.net> In-Reply-To: <20050506081805.GA19401@gate.ebshome.net> Content-Type: multipart/mixed; boundary="------------080006060305030709000008" Cc: linuxppc-embedded list Subject: Re: [RFC][PATCH 2.6.12-rc2] Updated platform additions for 82xx List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , This is a multi-part message in MIME format. --------------080006060305030709000008 Content-Type: multipart/alternative; boundary="------------030602000304040102000407" --------------030602000304040102000407 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Eugene Surovegin wrote: >On Fri, May 06, 2005 at 11:54:08AM +0400, Vitaly Bordug wrote: > >[snip] > > > >>+static struct cpm2_fec_platform_data mpc82xx_fcc1_pdata = { >>+ .cp_page = CPM_CR_FCC1_PAGE, >>+ .cp_block = CPM_CR_FCC1_SBLOCK, >>+ .clk_trx = (PC_F1RXCLK | PC_F1TXCLK), >>+ .clk_route = CMX1_CLK_ROUTE, >>+ .clk_mask = CMX1_CLK_MASK, >>+ .mdio = PC_MDIO, >>+ .mdck = PC_MDCK, >>+ >>+ .device_flags = FSL_CPM2_FEC_BRD_HAS_PHY_INTR, >>+ .phyid = 0, >>+ .interruptPHY = SIU_INT_IRQ5, >>+}; >> >> > >Hmm, interruptPHY here still looks somewhat odd. Why not use the same >approach as for the rest of the fields - "default" if corresponding >define wasn't defined by the board port? > >Not that I like this approach, IMHO there should be _NO_ defines at >all here and board setup code must fill them, but I guess it's OK >for now, mostly because there is no board specific files for 82xx >boards yet and this makes the patch quite small. > > > Eugene, Probably this is a better way? PHY_INTERRUPT is defined in the board-specific platforms/pq2ads.h (likewise approach was used in 2.4). Others from this define crowd should reside as they are IMHO, until we have some common board-specific header for 82xx (or all these will be scattered along different 82xx platform defines such as tqm8260.h etc. which is even worse). What do you think? -- Sincerely, Vitaly --------------030602000304040102000407 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Eugene Surovegin wrote:

On Fri, May 06, 2005 at 11:54:08AM +0400, Vitaly Bordug wrote:

[snip]

+static struct cpm2_fec_platform_data mpc82xx_fcc1_pdata = {
+	.cp_page	= CPM_CR_FCC1_PAGE,
+	.cp_block 	= CPM_CR_FCC1_SBLOCK,
+	.clk_trx 	= (PC_F1RXCLK | PC_F1TXCLK),
+	.clk_route	= CMX1_CLK_ROUTE,
+	.clk_mask	= CMX1_CLK_MASK,
+	.mdio		= PC_MDIO,
+	.mdck		= PC_MDCK,
+	
+	.device_flags	= FSL_CPM2_FEC_BRD_HAS_PHY_INTR,
+	.phyid 		= 0,
+	.interruptPHY	= SIU_INT_IRQ5,
+};


Hmm, interruptPHY here still looks somewhat odd. Why not use the same 
approach as for the rest of the fields - "default" if corresponding 
define wasn't defined by the board port? 

Not that I like this approach, IMHO there should be _NO_ defines at 
all here and board setup code must fill them, but I guess it's OK 
for now, mostly because there is no board specific files for 82xx 
boards yet and this makes the patch quite small.

Eugene,
Probably this is a better way?

PHY_INTERRUPT is defined in the board-specific platforms/pq2ads.h (likewise approach was used in 2.4). Others from this define crowd should reside as they are IMHO, until we have some common board-specific header for 82xx (or all these will be scattered along different 82xx platform defines such as tqm8260.h etc. which is even worse). What do you think?

-- 
Sincerely, 
Vitaly

--------------030602000304040102000407-- --------------080006060305030709000008 Content-Type: text/x-patch; name="basic_platform_st1.patch" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="basic_platform_st1.patch" diff -Nru a/arch/ppc/syslib/mpc82xx_devices.c b/arch/ppc/syslib/mpc82xx_devices.c --- /dev/null Wed Dec 31 16:00:00 196900 +++ b/arch/ppc/syslib/mpc82xx_devices.c 2005-05-06 12:59:22 +04:00 @@ -0,0 +1,213 @@ +/* + * arch/ppc/syslib/mpc82xx_devices.c + * + * MPC82xx Device descriptions + * + * Maintainer: Kumar Gala + * + * 2005 (c) MontaVista Software, Inc. + * Vitaly Bordug + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +/* FCC1 Clock Source Configuration. These can be redefined in the board specific file. + Can only choose from CLK9-12 */ +#ifndef F1_RXCLK +#define F1_RXCLK 12 +#endif + +#ifndef F1_TXCLK +#define F1_TXCLK 11 +#endif + +/* FCC2 Clock Source Configuration. These can be redefined in the board specific file. + Can only choose from CLK13-16 */ +#ifndef F2_RXCLK +#define F2_RXCLK 13 +#endif + +#ifndef F2_TXCLK +#define F2_TXCLK 14 +#endif + +/* FCC3 Clock Source Configuration. These can be redefined in the board specific file. + Can only choose from CLK13-16 */ +#ifndef F3_RXCLK +#define F3_RXCLK 15 +#endif + +#ifndef F3_TXCLK +#define F3_TXCLK 16 +#endif + +/* MDIO and MDCK settings. These can be redefined in the board specific file.*/ +#ifndef PC_MDIO +#define PC_MDIO 0x00000004U +#endif + +#ifndef PC_MDCK +#define PC_MDCK 0x00000020U +#endif + +/* Automatically generates register configurations */ +#define PC_CLK(x) ((uint)(1<<(x-1))) /* FCC CLK I/O ports */ + +#define CMXFCR_RF1CS(x) ((uint)((x-5)<<27)) /* FCC1 Receive Clock Source */ +#define CMXFCR_TF1CS(x) ((uint)((x-5)<<24)) /* FCC1 Transmit Clock Source */ +#define CMXFCR_RF2CS(x) ((uint)((x-9)<<19)) /* FCC2 Receive Clock Source */ +#define CMXFCR_TF2CS(x) ((uint)((x-9)<<16)) /* FCC2 Transmit Clock Source */ +#define CMXFCR_RF3CS(x) ((uint)((x-9)<<11)) /* FCC3 Receive Clock Source */ +#define CMXFCR_TF3CS(x) ((uint)((x-9)<<8)) /* FCC3 Transmit Clock Source */ + +#define PC_F1RXCLK PC_CLK(F1_RXCLK) +#define PC_F1TXCLK PC_CLK(F1_TXCLK) +#define CMX1_CLK_ROUTE (CMXFCR_RF1CS(F1_RXCLK) | CMXFCR_TF1CS(F1_TXCLK)) +#define CMX1_CLK_MASK ((uint)0xff000000) + +#define PC_F2RXCLK PC_CLK(F2_RXCLK) +#define PC_F2TXCLK PC_CLK(F2_TXCLK) +#define CMX2_CLK_ROUTE (CMXFCR_RF2CS(F2_RXCLK) | CMXFCR_TF2CS(F2_TXCLK)) +#define CMX2_CLK_MASK ((uint)0x00ff0000) + +#define PC_F3RXCLK PC_CLK(F3_RXCLK) +#define PC_F3TXCLK PC_CLK(F3_TXCLK) +#define CMX3_CLK_ROUTE (CMXFCR_RF3CS(F3_RXCLK) | CMXFCR_TF3CS(F3_TXCLK)) +#define CMX3_CLK_MASK ((uint)0x0000ff00) + +/* We use offsets for IORESOURCE_MEM since we do not know at compile time + * what IMMRBAR is, will get fixed up by mach_mpc82xx_fixup + */ + +static struct cpm2_fec_platform_data mpc82xx_fcc1_pdata = { + .cp_page = CPM_CR_FCC1_PAGE, + .cp_block = CPM_CR_FCC1_SBLOCK, + .clk_trx = (PC_F1RXCLK | PC_F1TXCLK), + .clk_route = CMX1_CLK_ROUTE, + .clk_mask = CMX1_CLK_MASK, + .mdio = PC_MDIO, + .mdck = PC_MDCK, + + .phyid = 0, +#ifdef PHY_INTERRUPT + .device_flags = FSL_CPM2_FEC_BRD_HAS_PHY_INTR, + .interruptPHY = PHY_INTERRUPT, +#endif +}; + +static struct cpm2_fec_platform_data mpc82xx_fcc2_pdata = { + .cp_page = CPM_CR_FCC2_PAGE, + .cp_block = CPM_CR_FCC2_SBLOCK, + .clk_trx = (PC_F2RXCLK | PC_F2TXCLK), + .clk_route = CMX2_CLK_ROUTE, + .clk_mask = CMX2_CLK_MASK, + .mdio = PC_MDIO, + .mdck = PC_MDCK, + + .phyid = 3, +#ifdef PHY_INTERRUPT + .device_flags = FSL_CPM2_FEC_BRD_HAS_PHY_INTR, + .interruptPHY = PHY_INTERRUPT, +#endif +}; + + + +struct platform_device ppc_sys_platform_devices[] = { + [MPC82xx_FCC1] = { + .name = "cpm2_fcc", + .id = 1, + .dev.platform_data = &mpc82xx_fcc1_pdata, + .num_resources = 4, + .resource = (struct resource[]) { + { + .name = "fcc_regs", + .start = 0x11300, + .end = 0x1131f, + .flags = IORESOURCE_MEM, + }, + { + .name = "fcc_pram", + .start = 0x8400, + .end = 0x84ff, + .flags = IORESOURCE_MEM, + }, + { + .name = "fcc_mem", + .start = 0x9000, + .end = 0x907f, + .flags = IORESOURCE_MEM, + }, + { + .name = "interrupt", + .start = SIU_INT_FCC1, + .end = SIU_INT_FCC1, + .flags = IORESOURCE_IRQ, + }, + }, + }, + [MPC82xx_FCC2] = { + .name = "cpm2_fcc", + .id = 2, + .dev.platform_data = &mpc82xx_fcc2_pdata, + .num_resources = 4, + .resource = (struct resource[]) { + { + .name = "fcc_regs", + .start = 0x11320, + .end = 0x1133f, + .flags = IORESOURCE_MEM, + }, + { + .name = "fcc_pram", + .start = 0x8500, + .end = 0x85ff, + .flags = IORESOURCE_MEM, + }, + { + .name = "fcc_mem", + .start = 0x9080, + .end = 0x90ff, + .flags = IORESOURCE_MEM, + }, + { + .name = "interrupt", + .start = SIU_INT_FCC2, + .end = SIU_INT_FCC2, + .flags = IORESOURCE_IRQ, + }, + }, + } +}; + +static int __init mach_mpc82xx_fixup(struct platform_device *pdev) +{ + ppc_sys_fixup_mem_resource(pdev, CPM_MAP_ADDR); + return 0; +} + +static int __init mach_mpc82xx_init(void) +{ + if (ppc_md.progress) + ppc_md.progress("mach_mpc82xx_init:enter", 0); + ppc_sys_device_fixup = mach_mpc82xx_fixup; + return 0; +} + +postcore_initcall(mach_mpc82xx_init); diff -Nru a/arch/ppc/syslib/mpc82xx_sys.c b/arch/ppc/syslib/mpc82xx_sys.c --- /dev/null Wed Dec 31 16:00:00 196900 +++ b/arch/ppc/syslib/mpc82xx_sys.c 2005-05-06 12:59:22 +04:00 @@ -0,0 +1,42 @@ +/* + * arch/ppc/syslib/mpc82xx_devices.c + * + * MPC82xx System descriptions + * + * Maintainer: Kumar Gala + * + * 2005 (c) MontaVista Software, Inc. + * Vitaly Bordug + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include +#include +#include + +#include + + +struct ppc_sys_spec *cur_ppc_sys_spec; +struct ppc_sys_spec ppc_sys_specs[] = { + + { + .ppc_sys_name = "MPC8272ads", + .mask = 0xFFFF0000, + .value = 0x0c100000, + .num_devices = 2, + .device_list = (enum ppc_sys_devices[]) + { + MPC82xx_FCC1, + MPC82xx_FCC2, + }, + }, + { /* default match */ + .ppc_sys_name = "", + .mask = 0x00000000, + .value = 0x00000000, + }, +}; diff -Nru a/include/asm-ppc/mpc8260.h b/include/asm-ppc/mpc8260.h --- a/include/asm-ppc/mpc8260.h 2005-05-06 12:59:22 +04:00 +++ b/include/asm-ppc/mpc8260.h 2005-05-06 12:59:22 +04:00 @@ -74,6 +74,11 @@ extern unsigned char __res[]; #endif +enum ppc_sys_devices { + MPC82xx_FCC1, + MPC82xx_FCC2, +}; + #endif /* CONFIG_8260 */ #endif /* !__ASM_PPC_MPC8260_H__ */ #endif /* __KERNEL__ */ diff -Nru a/include/asm-ppc/ppc_sys.h b/include/asm-ppc/ppc_sys.h --- a/include/asm-ppc/ppc_sys.h 2005-05-06 12:59:22 +04:00 +++ b/include/asm-ppc/ppc_sys.h 2005-05-06 12:59:22 +04:00 @@ -27,6 +27,8 @@ #include #elif defined(CONFIG_PPC_MPC52xx) #include +#elif defined(CONFIG_8260) +#include #else #error "need definition of ppc_sys_devices" #endif --------------080006060305030709000008--