Schaefer-Hutter, Peter wrote:
Hello,

  
From: Vitaly Bordug [mailto:vbordug@ru.mvista.com] 
    

  
The board does not hang - there's somithing with 
console since you don't see anything.  Try to change 
BCSR_ADDR from 0xf4500000 to 0xf80...0 - the newer 
version of the boards may have this changed.
    

Hrm... arc/ppc/mpc885ads.h already reads

  /* U-Boot maps BCSR to 0xff080000 */
  #define BCSR_ADDR   ((uint)0xff080000)

And that's the same setting that my 2.4-Kernel
uses, so it should work with 0xff080000.

However, BCSR_SIZE looks suspicious in this header:

  #define BCSR_SIZE   ((uint)32)

Shouldn't that read:

  #define BCSR_SIZE   ((uint)32 * 1024)

??!?

Regards,

  Peter

  
<quotation> (This is from 8272 User Guide, but 885 I guess is the same in this part)
Most of the hardware options on the MPC8272ADS are controlled or monitored by the
BCSR, which is a 32 bit wide read / write register file. The BCSR is accessed via the
MPC8272s’ memory controller (see Table 5-5) and in fact includes 8 registers: BCSR0 to
BCSR7. Since the minimum block size for a CS region is 32KBytes and only A(27:29)
lines are decoded by the BCSR for register selection, BCSR0 - BCSR7 are duplicated inside
that region.
<quotation\>

-- 
Sincerely, 
Vitaly