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[88.29.167.41]) by smtp.gmail.com with ESMTPSA id n5-20020a5d51c5000000b002c70d97af78sm13463701wrv.85.2023.03.01.09.52.36 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 01 Mar 2023 09:52:37 -0800 (PST) Message-ID: <4306d877-e667-4bf9-276c-a68bf4e9717e@linaro.org> Date: Wed, 1 Mar 2023 18:52:33 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: Re: [PATCH v2 09/11] aspeed: Introduce a spi_boot region under the SoC Content-Language: en-US To: =?UTF-8?Q?C=c3=a9dric_Le_Goater?= , qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Peter Maydell , Joel Stanley , Andrew Jeffery References: <20230301165619.2171090-1-clg@kaod.org> <20230301165619.2171090-10-clg@kaod.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= In-Reply-To: <20230301165619.2171090-10-clg@kaod.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.09, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org X-TUID: Ygbo8j569bWi On 1/3/23 17:56, Cédric Le Goater wrote: > The default boot address of the Aspeed SoCs is 0x0. For this reason, > the FMC flash device contents are remapped by HW on the first 256MB of > the address space. In QEMU, this is currently done in the machine init > with the setup of a region alias. > > Move this code to the SoC and introduce an extra container to prepare > ground for the boot ROM region which will overlap the FMC flash > remapping. > > Signed-off-by: Cédric Le Goater > --- > include/hw/arm/aspeed_soc.h | 5 +++++ > hw/arm/aspeed.c | 13 +------------ > hw/arm/aspeed_ast2600.c | 13 +++++++++++++ > hw/arm/aspeed_soc.c | 14 ++++++++++++++ Why aspeed2600 duplicates a lot of aspeed_soc_init() / aspeed_soc_realize() while inheriting from TYPE_ASPEED_SOC? Is that on purpose or because not using device_class_set_parent_realize? Reviewed-by: Philippe Mathieu-Daudé > hw/arm/fby35.c | 8 +------- > 5 files changed, 34 insertions(+), 19 deletions(-)