RE: [External Mail] Re: Test result / finding of "drm/amd/display: Consult MCCS FreeSync cap only if requested & supported"

[Pei-Hsin Yang <peihsiny@valvesoftware.com>]

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> Note that some kind of short-term solution is needed for the regression(s) in 7.1-rc.

Here is my suggestion as a short-term workaround:  
	- Just refer to the vsdb_info data structure to set the value of freesync_capable.  freesync_mccs_vcp_code = 0 doesn't mean FreeSync is not supported.
	- Check both freesync_supported and freesync_mccs_vcp_code along with do_mccs to call dm_helpers_mccs_vcp_set().
	- Note that MCCS command over DDC might be failed at runtime, but at least, it will not inadvertently disable the VRR if (1) sink is FreeSync supported but vcp_code = 0, or (2) dm_helpers_read_mccs_cap() failed intermittently at runtime.

Patch created based on commit 53f0235c0284fc676d1510a460e1c6c111de3ea1 is attached as a reference for AMD team to review.

commit 53f0235c0284fc676d1510a460e1c6c111de3ea1 (HEAD -> amd-staging-drm-next, origin/amd-staging-drm-next, origin/HEAD)

Thanks
Pei-Hsin


-----Original Message-----
From: Michel Dänzer <michel.daenzer@mailbox.org> 
Sent: Thursday, May 21, 2026 12:10 AM
To: Pei-Hsin Yang <peihsiny@valvesoftware.com>
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [External Mail] Re: Test result / finding of "drm/amd/display: Consult MCCS FreeSync cap only if requested & supported"

On 5/20/26 17:54, Pei-Hsin Yang wrote:
> 
>> Tested with 3 HDMI sinks with different FreeSync/HDMI VRR capabilities.  I saw one case that a FreeSync sink (Dell S2721HS) with E6h VCP code supported was detected as FreeSync capable at beginning but identified as not FreeSync capable later – after do_mccs is changed from true to false.
> 
>>> And that doesn't happen without my patch applied?
> 
> There are other issues without your patch applied.   One issue is that if a FreeSync capable sink with MCCS VCP Code = 0 (mostly are TVs), it will be detected as not FreeSync supported and VRR will be disabled.

That sounds similar to https://gitlab.freedesktop.org/drm/amd/-/work_items/5286 .


I was wondering if the specific issue you described above with Dell S2721HS is reproducible without my patch though, in which case it might be a separate regression (and wouldn't speak against merging my patch).


>>> TBH I don't really want to be fixing the regression I hit, I'd prefer the AMD display team to handle it.
> 
> Yes, agreed.  As FreeSync MCCS support has immediate impacts to Valve's Steam devices, I will work with AMD display team to handle it.   HDMI 2.1 VRR and VTEM packet sending support need to be included as well.

Note that some kind of short-term solution is needed for the regression(s) in 7.1-rc.


-- 
Earthling Michel Dänzer       \        GNOME / Xwayland / Mesa developer
https://redhat.com             \               Libre software enthusiast


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diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index af0af7519517..ffc0273fcf61 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -13680,11 +13680,10 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
 
 	if ((sink->sink_signal == SIGNAL_TYPE_HDMI_TYPE_A ||
 		as_type == FREESYNC_TYPE_PCON_IN_WHITELIST) &&
-		(!sink->edid_caps.freesync_vcp_code ||
-		(sink->edid_caps.freesync_vcp_code && !sink->mccs_caps.freesync_supported)))
+		(!vsdb_info.freesync_supported))
 		freesync_capable = false;
 
-	if (do_mccs && sink->mccs_caps.freesync_supported && freesync_capable)
+	if (do_mccs && vsdb_info.freesync_supported && vsdb_info.freesync_mccs_vcp_code)
 		dm_helpers_mccs_vcp_set(adev->dm.dc->ctx, amdgpu_dm_connector->dc_link, sink);
 
 update: