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From: GaLi <g_cavelier@yahoo.fr>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] IDE busmaster DMA support
Date: Fri, 30 Sep 2005 15:00:45 +0200	[thread overview]
Message-ID: <433D36FD.6080401@yahoo.fr> (raw)
In-Reply-To: <200509301204.j8UC4jK0026786@imap3.tools.intra>


OK, thank you very much.

GaLi

Juergen Keil wrote:
>>I'm trying to write an IDE driver with busmaster DMA support.
>>My problem is that I can't get the right controller registers addresses.
>>
>>In the IDE BusMaster DMA specification :
>>
>>"The control registers for the controller are allocated via the
>>devices Base Address register at offset 0x20 in PCI configuration
>>space."
>>
>>If I read the word at offset 0x20 in the PCI configuration space, I get 
>>0xc001. But if I boot qemu with a linux live-cd, it tells me that BM-DMA 
>>is at 0xc000
>>
>>Do I have to init the PCI IDE controller or something ?
> 
> 
> Bit 0 encodes if the registers are in IO (1) or in memory (0) space.
> You get the IO base address by using a 0xfffffffe mask.
> 
> For memory space the mask is 0xfffffff0, the low four bits encode
> a few memory properties (prefetch, 32-bit vs. 64-bit memory addresses).
> 
> See the PCI spec for more details. Or for example the PCI_BASE_* defines here:
> 
>   http://cvs.opensolaris.org/source/xref/usr/src/uts/common/sys/pci.h#519 

  reply	other threads:[~2005-09-30 13:04 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-09-30 12:04 [Qemu-devel] IDE busmaster DMA support Juergen Keil
2005-09-30 13:00 ` GaLi [this message]
  -- strict thread matches above, loose matches on Subject: below --
2005-09-30 10:15 GaLi
2005-09-30 11:17 ` Hetz Ben Hamo
2005-09-30 12:20   ` GaLi
2005-09-30 15:16 ` Lennert Buytenhek

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