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Date:	Tue, 04 Oct 2005 15:54:47 +0200
From:	"Kevin D. Kissell" <kevink@mips.com>
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To:	"Maciej W. Rozycki" <macro@linux-mips.org>
CC:	Franck <vagabon.xyz@gmail.com>, Ralf Baechle <ralf@linux-mips.org>,
	linux-mips@linux-mips.org
Subject: Re: [PATCH] Add support for 4KS cpu.
References: <cda58cb80510040149p690397afo@mail.gmail.com> <Pine.LNX.4.61L.0510041219500.10696@blysk.ds.pg.gda.pl> <434277D5.1090603@mips.com> <Pine.LNX.4.61L.0510041358300.10696@blysk.ds.pg.gda.pl>
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Maciej W. Rozycki wrote:
> On Tue, 4 Oct 2005, Kevin D. Kissell wrote:
> 
> 
>>FWIW, the 4KSc is a strict superset of the 4Kc (anticipating
>>*some* of the Release 2 features, but not requiring them to be
>>used) and the 4KSd is a strict superset of the 4KE.  I would
>>not recommend configuring CPU_MIPS32_R2 for the 4KSc.
> 
> 
>  Well, the patch asked GCC to use the instruction set of the "4kec" CPU 
> for both (and also the "mips32r2" ISA, but that's overridden by the 
> former), so it must have been incorrect in the first place

Which was sort-of why I replied.  In particular, the MIPS32R2 bitfield
instructions will probably cause a reserved instruction fault on a 4KSc.

	Regards,

	Kevin K.