From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Gardner Subject: Re: Recent trace patch not arch-neutral Date: Mon, 31 Oct 2005 16:26:19 -0700 Message-ID: <4366A81B.2050509@hp.com> References: <4366A2B4.6070406@hp.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1150435698==" Return-path: In-Reply-To: <4366A2B4.6070406@hp.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Mime-version: 1.0 Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Rob Gardner Cc: "Magenheimer, Dan (HP Labs Fort Collins)" , Ian Pratt , xen-devel@lists.xensource.com List-Id: xen-devel@lists.xenproject.org This is a multi-part message in MIME format. --===============1150435698== Content-Type: multipart/alternative; boundary="------------060202090706010201050300" This is a multi-part message in MIME format. --------------060202090706010201050300 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Rob Gardner wrote: > > Now, to answer Dan's question- the rdtscll thing is just a time stamp > counter, expressed in cycles. So on ia64 you could probably replace it > with an asm statement to read ar.itc to make everything work. We just > need a little wrapper to do the right thing for each architecture. Now > Dan, if you were more conveniently located, perhaps we could work > together and fix this. ;) > I imagine we just need something that looks like this in trace.c: #ifdef x86 rdtscll(rec->cycles); #endif #ifdef IA64 __asm__ __volatile ("mov %0=ar.itc;;" : "=r"(rec->cycles) :: "memory"); #endif Dan, perhaps you know the nice clean way of doing this sort of thing? Rob --------------060202090706010201050300 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Rob Gardner wrote:

Now, to answer Dan's question- the rdtscll thing is just a time stamp counter, expressed in cycles. So on ia64 you could probably replace it with an asm statement to read ar.itc to make everything work. We just need a little wrapper to do the right thing for each architecture. Now Dan, if you were more conveniently located, perhaps we could work together and fix this. ;)


I imagine we just need something that looks like this in trace.c:

#ifdef x86
       rdtscll(rec->cycles);
#endif
#ifdef IA64
       __asm__ __volatile ("mov %0=ar.itc;;" : "=r"(rec->cycles) :: "memory");
#endif

Dan, perhaps you know the nice clean way of doing this sort of thing?

Rob

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