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Wed, 01 Apr 2026 05:40:34 -0700 (PDT) X-Received: by 2002:a17:903:384d:b0:2b0:c59f:3b58 with SMTP id d9443c01a7336-2b269ade166mr38667965ad.9.1775047234424; Wed, 01 Apr 2026 05:40:34 -0700 (PDT) Received: from [10.0.0.3] ([106.222.233.247]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b2427663acsm147974705ad.46.2026.04.01.05.40.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 01 Apr 2026 05:40:34 -0700 (PDT) Message-ID: <437123c2-35af-227c-3fe1-7d45ea1243da@oss.qualcomm.com> Date: Wed, 1 Apr 2026 18:10:28 +0530 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH v4 3/5] media: iris: Add platform data for X1P42100 Content-Language: en-US To: Wangao Wang , Bryan O'Donoghue , Vikash Garodia , Abhinav Kumar , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260401-enable_iris_on_purwa-v4-0-ca784552a3e9@oss.qualcomm.com> <20260401-enable_iris_on_purwa-v4-3-ca784552a3e9@oss.qualcomm.com> From: Dikshita Agarwal In-Reply-To: <20260401-enable_iris_on_purwa-v4-3-ca784552a3e9@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: Pu-Lbbiv6wdYt8LkUMHKDGUFp22xKVlA X-Proofpoint-ORIG-GUID: Pu-Lbbiv6wdYt8LkUMHKDGUFp22xKVlA X-Authority-Analysis: v=2.4 cv=B/C0EetM c=1 sm=1 tr=0 ts=69cd1244 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=5/Y9Gi2N1OwmQbPtUd2E/A==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=glT4pT81iDO7b4vcCO8A:9 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDAxMDExNSBTYWx0ZWRfX73nFTLxJ1/aG otK+8AMr6KceppysdFOYTZizDUBGJ7BBVCqmBUL76BKXmCAYtPdk16UUFwy5aJnkFFo1HIU3ocv AX1ifZ27P7notENiyg25FjKdGXfGWxGaiEIWOnmiOo1L3iV81OCdjFWQG6GTgzsuR1bDc9C1Kui HRGnUAVmrmhG7tfBbcbiFrdiMUbg1j3cNl6rZP9a7Ro2In2EZmL7ObO8kPurYDw3Kwzd0174hpl BGK6FESeZu26yzhPbhBO/pJQ4BJlZ5EKsg7u8qY/WYnLy3GpEmi0wDwHLGSlZumpt1nfu09Vtmk hhYfKEhhqgR5JXSbRllVIstADgC2P9KRtiMNYE+gCPzHx/x8FnnuQ4vQZKausmBoeMA8PpZ2rhG omI3joz8dfFN1tP+mvjYz+qWYCZWCOgqXNoDV7qluq+LeM9VxirTGMEUZWXjoCUu5xcIDO8VOA6 DaV1p0djzSFf58MxeWg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-01_04,2026-04-01_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 bulkscore=0 phishscore=0 malwarescore=0 lowpriorityscore=0 adultscore=0 clxscore=1015 impostorscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2604010115 On 4/1/2026 3:54 PM, Wangao Wang wrote: > Introduce platform data for X1P42100, derived from SM8550 but using a > different clock configuration and a dedicated OPP setup. > > Signed-off-by: Wangao Wang > --- > .../platform/qcom/iris/iris_platform_common.h | 1 + > .../media/platform/qcom/iris/iris_platform_gen2.c | 97 ++++++++++++++++++++++ > .../platform/qcom/iris/iris_platform_x1p42100.h | 22 +++++ > drivers/media/platform/qcom/iris/iris_probe.c | 4 + > 4 files changed, 124 insertions(+) > > diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/drivers/media/platform/qcom/iris/iris_platform_common.h > index 5a489917580eb10022fdcb52f7321a915e8b239d..2e97360ddcd56a4b61fb296782b0c914b6154784 100644 > --- a/drivers/media/platform/qcom/iris/iris_platform_common.h > +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h > @@ -47,6 +47,7 @@ extern const struct iris_platform_data sm8250_data; > extern const struct iris_platform_data sm8550_data; > extern const struct iris_platform_data sm8650_data; > extern const struct iris_platform_data sm8750_data; > +extern const struct iris_platform_data x1p42100_data; > > enum platform_clk_type { > IRIS_AXI_CLK, /* AXI0 in case of platforms with multiple AXI clocks */ > diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/drivers/media/platform/qcom/iris/iris_platform_gen2.c > index 5da90d47f9c6eab4a7e6b17841fdc0e599397bf7..aac72900c0292040500ec4dcde9bd6e7da225fd4 100644 > --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c > +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c > @@ -15,6 +15,7 @@ > #include "iris_platform_qcs8300.h" > #include "iris_platform_sm8650.h" > #include "iris_platform_sm8750.h" > +#include "iris_platform_x1p42100.h" > > #define VIDEO_ARCH_LX 1 > #define BITRATE_MAX 245000000 > @@ -1317,3 +1318,99 @@ const struct iris_platform_data qcs8300_data = { > .enc_op_int_buf_tbl = sm8550_enc_op_int_buf_tbl, > .enc_op_int_buf_tbl_size = ARRAY_SIZE(sm8550_enc_op_int_buf_tbl), > }; > + > +const struct iris_platform_data x1p42100_data = { > + .get_instance = iris_hfi_gen2_get_instance, > + .init_hfi_command_ops = iris_hfi_gen2_command_ops_init, > + .init_hfi_response_ops = iris_hfi_gen2_response_ops_init, > + .get_vpu_buffer_size = iris_vpu_buf_size, this needs a rebase on latest platform rework series. Thanks, Dikshita > + .vpu_ops = &iris_vpu3_purwa_ops, > + .set_preset_registers = iris_set_sm8550_preset_registers, > + .icc_tbl = sm8550_icc_table, > + .icc_tbl_size = ARRAY_SIZE(sm8550_icc_table), > + .clk_rst_tbl = sm8550_clk_reset_table, > + .clk_rst_tbl_size = ARRAY_SIZE(sm8550_clk_reset_table), > + .bw_tbl_dec = sm8550_bw_table_dec, > + .bw_tbl_dec_size = ARRAY_SIZE(sm8550_bw_table_dec), > + .pmdomain_tbl = sm8550_pmdomain_table, > + .pmdomain_tbl_size = ARRAY_SIZE(sm8550_pmdomain_table), > + .opp_pd_tbl = sm8550_opp_pd_table, > + .opp_pd_tbl_size = ARRAY_SIZE(sm8550_opp_pd_table), > + .clk_tbl = x1p42100_clk_table, > + .clk_tbl_size = ARRAY_SIZE(x1p42100_clk_table), > + .opp_clk_tbl = x1p42100_opp_clk_table, > + /* Upper bound of DMA address range */ > + .dma_mask = 0xe0000000 - 1, > + .fwname = "qcom/vpu/vpu30_p4.mbn", > + .pas_id = IRIS_PAS_ID, > + .inst_iris_fmts = platform_fmts_sm8550_dec, > + .inst_iris_fmts_size = ARRAY_SIZE(platform_fmts_sm8550_dec), > + .inst_caps = &platform_inst_cap_sm8550, > + .inst_fw_caps_dec = inst_fw_cap_sm8550_dec, > + .inst_fw_caps_dec_size = ARRAY_SIZE(inst_fw_cap_sm8550_dec), > + .inst_fw_caps_enc = inst_fw_cap_sm8550_enc, > + .inst_fw_caps_enc_size = ARRAY_SIZE(inst_fw_cap_sm8550_enc), > + .tz_cp_config_data = tz_cp_config_sm8550, > + .tz_cp_config_data_size = ARRAY_SIZE(tz_cp_config_sm8550), > + .core_arch = VIDEO_ARCH_LX, > + .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE, > + .ubwc_config = &ubwc_config_sm8550, > + .num_vpp_pipe = 1, > + .max_session_count = 16, > + .max_core_mbpf = NUM_MBS_8K * 2, > + .max_core_mbps = ((7680 * 4320) / 256) * 60, > + .dec_input_config_params_default = > + sm8550_vdec_input_config_params_default, > + .dec_input_config_params_default_size = > + ARRAY_SIZE(sm8550_vdec_input_config_params_default), > + .dec_input_config_params_hevc = > + sm8550_vdec_input_config_param_hevc, > + .dec_input_config_params_hevc_size = > + ARRAY_SIZE(sm8550_vdec_input_config_param_hevc), > + .dec_input_config_params_vp9 = > + sm8550_vdec_input_config_param_vp9, > + .dec_input_config_params_vp9_size = > + ARRAY_SIZE(sm8550_vdec_input_config_param_vp9), > + .dec_input_config_params_av1 = > + sm8550_vdec_input_config_param_av1, > + .dec_input_config_params_av1_size = > + ARRAY_SIZE(sm8550_vdec_input_config_param_av1), > + .dec_output_config_params = > + sm8550_vdec_output_config_params, > + .dec_output_config_params_size = > + ARRAY_SIZE(sm8550_vdec_output_config_params), > + > + .enc_input_config_params = > + sm8550_venc_input_config_params, > + .enc_input_config_params_size = > + ARRAY_SIZE(sm8550_venc_input_config_params), > + .enc_output_config_params = > + sm8550_venc_output_config_params, > + .enc_output_config_params_size = > + ARRAY_SIZE(sm8550_venc_output_config_params), > + > + .dec_input_prop = sm8550_vdec_subscribe_input_properties, > + .dec_input_prop_size = ARRAY_SIZE(sm8550_vdec_subscribe_input_properties), > + .dec_output_prop_avc = sm8550_vdec_subscribe_output_properties_avc, > + .dec_output_prop_avc_size = > + ARRAY_SIZE(sm8550_vdec_subscribe_output_properties_avc), > + .dec_output_prop_hevc = sm8550_vdec_subscribe_output_properties_hevc, > + .dec_output_prop_hevc_size = > + ARRAY_SIZE(sm8550_vdec_subscribe_output_properties_hevc), > + .dec_output_prop_vp9 = sm8550_vdec_subscribe_output_properties_vp9, > + .dec_output_prop_vp9_size = > + ARRAY_SIZE(sm8550_vdec_subscribe_output_properties_vp9), > + .dec_output_prop_av1 = sm8550_vdec_subscribe_output_properties_av1, > + .dec_output_prop_av1_size = > + ARRAY_SIZE(sm8550_vdec_subscribe_output_properties_av1), > + > + .dec_ip_int_buf_tbl = sm8550_dec_ip_int_buf_tbl, > + .dec_ip_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_ip_int_buf_tbl), > + .dec_op_int_buf_tbl = sm8550_dec_op_int_buf_tbl, > + .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), > + > + .enc_ip_int_buf_tbl = sm8550_enc_ip_int_buf_tbl, > + .enc_ip_int_buf_tbl_size = ARRAY_SIZE(sm8550_enc_ip_int_buf_tbl), > + .enc_op_int_buf_tbl = sm8550_enc_op_int_buf_tbl, > + .enc_op_int_buf_tbl_size = ARRAY_SIZE(sm8550_enc_op_int_buf_tbl), > +}; > diff --git a/drivers/media/platform/qcom/iris/iris_platform_x1p42100.h b/drivers/media/platform/qcom/iris/iris_platform_x1p42100.h > new file mode 100644 > index 0000000000000000000000000000000000000000..d89acfbc1233dad0692f6c13c3fc22b10e5bdd80 > --- /dev/null > +++ b/drivers/media/platform/qcom/iris/iris_platform_x1p42100.h > @@ -0,0 +1,22 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > + */ > + > +#ifndef __IRIS_PLATFORM_X1P42100_H__ > +#define __IRIS_PLATFORM_X1P42100_H__ > + > +static const struct platform_clk_data x1p42100_clk_table[] = { > + {IRIS_AXI_CLK, "iface" }, > + {IRIS_CTRL_CLK, "core" }, > + {IRIS_HW_CLK, "vcodec0_core" }, > + {IRIS_BSE_HW_CLK, "vcodec0_bse" }, > +}; > + > +static const char *const x1p42100_opp_clk_table[] = { > + "vcodec0_core", > + "vcodec0_bse", > + NULL, > +}; > + > +#endif > diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/platform/qcom/iris/iris_probe.c > index ddaacda523ecb9990af0dd0640196223fbcc2cab..287f615dfa6479964ed68649f2829b5bbeed6cd6 100644 > --- a/drivers/media/platform/qcom/iris/iris_probe.c > +++ b/drivers/media/platform/qcom/iris/iris_probe.c > @@ -374,6 +374,10 @@ static const struct of_device_id iris_dt_match[] = { > .compatible = "qcom,sm8750-iris", > .data = &sm8750_data, > }, > + { > + .compatible = "qcom,x1p42100-iris", > + .data = &x1p42100_data, > + }, > { }, > }; > MODULE_DEVICE_TABLE(of, iris_dt_match); >