From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jad Naous <jnaous@stanford.edu>
Subject: Custom Hardware Acceleration
Date: Thu, 26 Jan 2006 00:52:29 -0800
Message-ID: <43D88DCD.4050006@stanford.edu>
Mime-Version: 1.0
Content-Type: text/plain; charset=ISO-8859-1; format=flowed
Content-Transfer-Encoding: 7bit
Return-path: <xen-devel-bounces@lists.xensource.com>
List-Unsubscribe: <http://lists.xensource.com/cgi-bin/mailman/listinfo/xen-devel>,
	<mailto:xen-devel-request@lists.xensource.com?subject=unsubscribe>
List-Post: <mailto:xen-devel@lists.xensource.com>
List-Help: <mailto:xen-devel-request@lists.xensource.com?subject=help>
List-Subscribe: <http://lists.xensource.com/cgi-bin/mailman/listinfo/xen-devel>,
	<mailto:xen-devel-request@lists.xensource.com?subject=subscribe>
Sender: xen-devel-bounces@lists.xensource.com
Errors-To: xen-devel-bounces@lists.xensource.com
To: xen-devel@lists.xensource.com
List-Id: xen-devel@lists.xenproject.org

Hi all,
I am exploring the possibility of designing a custom hardware 
acceleration solution using an ASIC or an FPGA to accelerate some part 
of Xen. Basically, I am looking for some part of the code that could be 
built in hardware to make it faster. Does anybody know where I could get 
some statistics on the code, such as the most called functions, the most 
parallelizable functions, etc... If you could think of something that 
would be useful in HW I would be very interested to know.
Thanks,
Jad.