--- linux-2.6.15.4/include/asm-arm/arch-s3c2410/regs-gpio.h	2006-02-10 08:22:48.000000000 +0100
+++ golinux/include/asm-arm/arch-s3c2410/regs-gpio.h	2006-02-28 13:05:07.000000000 +0100
@@ -22,6 +22,7 @@
  *    28-Mar-2005    LCVR    Fixed definition of GPB10
  *    26-Oct-2005    BJD     Added generic configuration types
  *    27-Nov-2005    LCVR    Added definitions to S3C2400 registers
+ *    27-Feb-2006    KM      Added definitions to S3C2412 registers
 */
 
 
@@ -183,10 +184,12 @@
 #define S3C2410_GPBCON	   S3C2410_GPIOREG(0x10)
 #define S3C2410_GPBDAT	   S3C2410_GPIOREG(0x14)
 #define S3C2410_GPBUP	   S3C2410_GPIOREG(0x18)

 #define S3C2400_GPBCON	   S3C2410_GPIOREG(0x08)
 #define S3C2400_GPBDAT	   S3C2410_GPIOREG(0x0C)
 #define S3C2400_GPBUP	   S3C2410_GPIOREG(0x10)
+#ifdef CONFIG_CPU_S3C2412
+#define S3C2410_GPBSLPCON  S3C2410_GPIOREG(0x1c)
+#endif
 
 /* no i/o pin in port b can have value 3! */
 
@@ -306,6 +309,10 @@
 #define S3C2400_GPCDAT	   S3C2410_GPIOREG(0x18)
 #define S3C2400_GPCUP	   S3C2410_GPIOREG(0x1C)
 
+#ifdef CONFIG_CPU_S3C2412
+#define S3C2410_GPCSLPCON  S3C2410_GPIOREG(0x2c)
+#endif
+
 #define S3C2410_GPC0            S3C2410_GPIONO(S3C2410_GPIO_BANKC, 0)
 #define S3C2410_GPC0_INP	(0x00 << 0)
 #define S3C2410_GPC0_OUTP	(0x01 << 0)
@@ -423,6 +430,10 @@
 #define S3C2400_GPDDAT	   S3C2410_GPIOREG(0x24)
 #define S3C2400_GPDUP	   S3C2410_GPIOREG(0x28)
 
+#ifdef CONFIG_CPU_S3C2412
+#define S3C2410_GPDSLPCON  S3C2410_GPIOREG(0x3c)
+#endif
+
 #define S3C2410_GPD0            S3C2410_GPIONO(S3C2410_GPIO_BANKD, 0)
 #define S3C2410_GPD0_INP	(0x00 << 0)
 #define S3C2410_GPD0_OUTP	(0x01 << 0)
@@ -537,6 +548,10 @@
 #define S3C2400_GPEDAT	   S3C2410_GPIOREG(0x30)
 #define S3C2400_GPEUP	   S3C2410_GPIOREG(0x34)
 
+#ifdef CONFIG_CPU_S3C2412
+#define S3C2410_GPESLPCON  S3C2410_GPIOREG(0x4c)
+#endif
+
 #define S3C2410_GPE0           S3C2410_GPIONO(S3C2410_GPIO_BANKE, 0)
 #define S3C2410_GPE0_INP       (0x00 << 0)
 #define S3C2410_GPE0_OUTP      (0x01 << 0)
@@ -870,6 +885,10 @@
 #define S3C2410_GPHDAT	   S3C2410_GPIOREG(0x74)
 #define S3C2410_GPHUP	   S3C2410_GPIOREG(0x78)
 
+#ifdef CONFIG_CPU_S3C2412
+#define S3C2410_GPHSLPCON  S3C2410_GPIOREG(0x7c)
+#endif
+
 #define S3C2410_GPH0        S3C2410_GPIONO(S3C2410_GPIO_BANKH, 0)
 #define S3C2410_GPH0_INP    (0x00 << 0)
 #define S3C2410_GPH0_OUTP   (0x01 << 0)
@@ -932,6 +951,11 @@
 #define S3C2410_MISCCR	   S3C2410_GPIOREG(0x80)
 #define S3C2410_DCLKCON	   S3C2410_GPIOREG(0x84)
 
+#ifdef CONFIG_CPU_S3C2412
+#define S3C2412_MISCCR     S3C2410_GPIOREG(0x90)
+#define S3C2412_DCLKCON    S3C2410_GPIOREG(0x94)
+#endif
+
 /* see clock.h for dclk definitions */
 
 /* pullup control on databus */
@@ -948,6 +972,18 @@
 #define S3C2400_MISCCR_HZ_STOPEN    (0<<2)
 #define S3C2400_MISCCR_HZ_STOPPREV  (1<<2)
 
+#ifdef CONFIG_CPU_S3C2412
+
+#define S3C2412_MISCCR_SPUCR_HEN    (0)
+#define S3C2412_MISCCR_SPUCR_HDIS   (1<<1)
+#define S3C2412_MISCCR_SPUCR_LEN    (0)
+#define S3C2412_MISCCR_SPUCR_LDIS   (1<<0)
+  	 
+#define S3C2412_MISCCR_SPUCR2_EN    (0<<2)
+#define S3C2412_MISCCR_SPUCR2_DIS   (1<<2)
+
+#endif
+
 #define S3C2410_MISCCR_USBDEV	    (0<<3)
 #define S3C2410_MISCCR_USBHOST	    (1<<3)
 
@@ -989,6 +1025,12 @@
 #define S3C2410_EXTINT1	   S3C2410_GPIOREG(0x8C)
 #define S3C2410_EXTINT2	   S3C2410_GPIOREG(0x90)
 
+#ifdef CONFIG_CPU_S3C2412
+#define S3C2412_EXTINT0    S3C2410_GPIOREG(0x98)
+#define S3C2412_EXTINT1    S3C2410_GPIOREG(0x9C)
+#define S3C2412_EXTINT2    S3C2410_GPIOREG(0xA0)
+#endif
+
 /* values for S3C2410_EXTINT0/1/2 */
 #define S3C2410_EXTINT_LOWLEV	 (0x00)
 #define S3C2410_EXTINT_HILEV	 (0x01)
@@ -1002,6 +1044,13 @@
 #define S3C2410_EINFLT2	   S3C2410_GPIOREG(0x9C)
 #define S3C2410_EINFLT3	   S3C2410_GPIOREG(0xA0)
 
+#ifdef CONFIG_CPU_S3C2412
+#define S3C2412_EINFLT0    S3C2410_GPIOREG(0xA4)
+#define S3C2412_EINFLT1    S3C2410_GPIOREG(0xA8)
+#define S3C2412_EINFLT2    S3C2410_GPIOREG(0xAc)
+#define S3C2412_EINFLT3    S3C2410_GPIOREG(0xB0)
+#endif
+
 /* values for interrupt filtering */
 #define S3C2410_EINTFLT_PCLK		(0x00)
 #define S3C2410_EINTFLT_EXTCLK		(1<<7)
@@ -1019,6 +1068,17 @@
 #define S3C2410_GSTATUS3   S3C2410_GPIOREG(0x0B8)
 #define S3C2410_GSTATUS4   S3C2410_GPIOREG(0x0BC)
 
+#ifdef CONFIG_CPU_S3C2412
+
+#define S3C2412_GSTATUS0   S3C2410_GPIOREG(0x0BC)
+#define S3C2412_GSTATUS1   S3C2410_GPIOREG(0x0C0)
+#define S3C2412_GSTATUS2   S3C2410_GPIOREG(0x0C4)
+#define S3C2412_GSTATUS3   S3C2410_GPIOREG(0x0C8)
+#define S3C2412_GSTATUS4   S3C2410_GPIOREG(0x0CC)
+#define S3C2412_GSTATUS5   S3C2410_GPIOREG(0x0D0)
+
+#endif
+
 #define S3C2410_GSTATUS0_nWAIT	   (1<<3)
 #define S3C2410_GSTATUS0_NCON	   (1<<2)
 #define S3C2410_GSTATUS0_RnB	   (1<<1)