From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1FJv2D-0007UF-B0 for qemu-devel@nongnu.org; Thu, 16 Mar 2006 11:09:09 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1FJv2C-0007U3-Nc for qemu-devel@nongnu.org; Thu, 16 Mar 2006 11:09:09 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1FJv2C-0007U0-EL for qemu-devel@nongnu.org; Thu, 16 Mar 2006 11:09:08 -0500 Received: from [24.93.47.43] (helo=ms-smtp-04.texas.rr.com) by monty-python.gnu.org with esmtp (Exim 4.52) id 1FJv6s-0006zy-Jk for qemu-devel@nongnu.org; Thu, 16 Mar 2006 11:13:58 -0500 Received: from [192.168.0.11] (cpe-67-9-160-120.austin.res.rr.com [67.9.160.120]) by ms-smtp-04.texas.rr.com (8.13.4/8.13.4) with ESMTP id k2GG969F010024 for ; Thu, 16 Mar 2006 10:09:06 -0600 (CST) Message-ID: <44198DA1.1050209@austin.rr.com> Date: Thu, 16 Mar 2006 10:09:05 -0600 From: Lonnie Mendez MIME-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH] hw/usb-uhci.c: set hchalt bit of status register when run/stop bit unset References: <44192919.6090102@austin.rr.com> In-Reply-To: <44192919.6090102@austin.rr.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org lo again. Please note that this patch isn't needed for Windows XP host system. This bug affects this os as a guest only. Sorry if I didn't make it clear. Also, I did modify it somewhat as it is now more correct and much simplier to wait for the R/S bit to be unset in the frame timer code. That way it can be sure that the processing for the last frame has stopped before setting hchalted.