From mboxrd@z Thu Jan 1 00:00:00 1970 From: Heiko =?ISO-8859-1?Q?St=FCbner?= Subject: Re: [PATCH v4 4/7] drm/panel: simple: Use display_timing for Innolux n116bge Date: Fri, 29 Mar 2019 20:17:57 +0100 Message-ID: <4434574.6rqfZtZq1D@diego> References: <20190328171710.31949-1-dianders@chromium.org> <20190328171710.31949-5-dianders@chromium.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20190328171710.31949-5-dianders@chromium.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Douglas Anderson Cc: Rob Herring , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, Thierry Reding , Sean Paul , Laurent Pinchart , Boris Brezillon , Enric =?ISO-8859-1?Q?Balletb=F2?= , Ezequiel Garcia , mka@chromium.org List-Id: linux-rockchip.vger.kernel.org QW0gRG9ubmVyc3RhZywgMjguIE3DpHJ6IDIwMTksIDE4OjE3OjA3IENFVCBzY2hyaWViIERvdWds YXMgQW5kZXJzb246Cj4gQ29udmVydCB0aGUgSW5ub2x1eCBuMTE2YmdlIGZyb20gdXNpbmcgYSBm aXhlZCBtb2RlIHRvIHNwZWNpZnlpbmcgYQo+IGRpc3BsYXkgdGltaW5nIHdpdGggbWluL3R5cC9t YXggdmFsdWVzLgo+IAo+IE5vdGUgdGhhdCB0aGUgbjExNmJnZSdzIGRhdGFzaGVldCBkb2Vzbid0 IGZpdCB0b28gd2VsbCBpbnRvIERSTSdzIHdheQo+IG9mIHNwZWNpZnlpbmcgdGhpbmdzLiAgU3Bl Y2lmaWNhbGx5IHRoZSBwYW5lbCdzIGRhdGFzaGVldCBqdXN0Cj4gc3BlY2lmaWVzIHRoZSB2ZXJ0 aWNhbCBibGFua2luZyBwZXJpb2QgYW5kIGhvcml6b250YWwgYmxhbmtpbmcgcGVyaW9kCj4gYW5k IGRvZXNuJ3QgYnJlYWsgdGhpbmdzIG91dC4gIEZvciBub3cgd2UnbGwgbGVhdmUgZXZlcnl0aGlu ZyBhcyBhCj4gZml4ZWQgdmFsdWUgYnV0IGp1c3QgYWxsb3cgYWRqdXN0aW5nIHRoZSBwaXhlbCBj bG9jay4gIEkndmUgYWRkZWQgYQo+IGNvbW1lbnQgb24gd2hhdCB0aGUgZGF0YXNoZWV0IGNsYWlt cyBzbyBzb21lb25lIGNvdWxkIGxhdGVyIGV4cGFuZAo+IHRoaW5ncyB0byBmaXQgdGhlaXIgbmVl ZHMgaWYgdGhleSB3YW50ZWQgdG8gdGVzdCBvdGhlciBibGFua2luZwo+IHBlcmlvZHMuCj4gCj4g VGhlIGdvYWwgaGVyZSBpcyB0byBiZSBhYmxlIHRvIHNwZWNpZnkgdGhlIHBhbmVsIHRpbWluZ3Mg aW4gdGhlIGRldmljZQo+IHRyZWUgZm9yIHNldmVyYWwgcmszMjg4IENocm9tZWJvb2tzIChsaWtl IHJrMzI4OC12ZXJ5b24tamVycnkpLiAgVGhlc2UKPiBDaHJvbWVib29rcyBoYXZlIGFsbCBiZWVu IHJ1bm5pbmcgaW4gdGhlIGRvd25zdHJlYW0ga2VybmVsIHdpdGggdGhlCj4gc3RhbmRhcmQgcG9y Y2hlcyBhbmQgc3luYyBsZW5ndGhzIGJ1dCBqdXN0IHdpdGggYSBzbGlnaHRseSBzbG93ZXIKPiBw aXhlbCBjbG9jayBiZWNhdXNlIHRoZSA3Ni40MiBNSHogY2xvY2sgaXMgbm90IGFjaGlldmFibGUg ZnJvbSB0aGUKPiBmaXhlZCBQTEwgdGhhdCB3YXMgYXZhaWxhYmxlLiAgVGhlc2UgQ2hyb21lYm9v a3Mgb25seSBhY2hpZXZlIGEKPiByZWZyZXNoIHJhdGUgb2YgfjU4IEh6LiAgV2hpbGUgaXQncyBw cm9iYWJsZSB0aGF0IHdlIGNvdWxkIGFkanVzdCB0aGUKPiB0aW1pbmdzIHRvIGFjaGlldmUgNjAg SHogaXQncyBwcm9iYWJseSB3aXNlc3QgdG8gbWF0Y2ggd2hhdCdzIGJlZW4KPiBydW5uaW5nIG9u IHRoZXNlIGRldmljZXMgYWxsIHRoZXNlIHllYXJzLgo+IAo+IEknbGwgbm90ZSB0aGF0IHRob3Vn aCB0aGUgdXBzdHJlYW0ga2VybmVsIGhhcyBhbHdheXMgdHJpZWQgdG8gYWNoaWV2ZQo+IDc2LjQy IE1IeiwgaXQgaGFzIGFjdHVhbGx5IGJlZW4gcnVubmluZyBhdCA3NC4yNSBNSHogYWxzbyBzaW5j ZSB0aGUKPiB2aWRlbyBwcm9jZXNzb3IgaXMgcGFyZW50ZWQgb2ZmIHRoZSBzYW1lIGZpeGVkIFBM TC4KPiAKPiBDaGFuZ2VzIGluIHY0Ogo+ICAtIGRpc3BsYXlfdGltaW5nIGZvciBJbm5vbHV4IG4x MTZiZ2UgbmV3IGZvciB2NC4KPiAKPiBTaWduZWQtb2ZmLWJ5OiBEb3VnbGFzIEFuZGVyc29uIDxk aWFuZGVyc0BjaHJvbWl1bS5vcmc+CgpvbiBhIHJrMzI4OC1qZXJyeSBhbmQgcmszMjg4LXBpbmt5 ClRlc3RlZC1ieTogSGVpa28gU3R1ZWJuZXIgPGhlaWtvQHNudGVjaC5kZT4KCgoKX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVsIG1haWxpbmcg bGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRl c2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVs From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38665C43381 for ; Fri, 29 Mar 2019 19:18:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id F33E2218A5 for ; Fri, 29 Mar 2019 19:18:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729920AbfC2TSE convert rfc822-to-8bit (ORCPT ); Fri, 29 Mar 2019 15:18:04 -0400 Received: from gloria.sntech.de ([185.11.138.130]:40010 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729720AbfC2TSE (ORCPT ); Fri, 29 Mar 2019 15:18:04 -0400 Received: from ip5f5a6320.dynamic.kabel-deutschland.de ([95.90.99.32] helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1h9x0o-0000Pg-Ls; Fri, 29 Mar 2019 20:17:58 +0100 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: Douglas Anderson Cc: Thierry Reding , Sean Paul , linux-rockchip@lists.infradead.org, Laurent Pinchart , dri-devel@lists.freedesktop.org, Boris Brezillon , Ezequiel Garcia , Enric =?ISO-8859-1?Q?Balletb=F2?= , Rob Herring , mka@chromium.org, David Airlie , linux-kernel@vger.kernel.org, Daniel Vetter Subject: Re: [PATCH v4 4/7] drm/panel: simple: Use display_timing for Innolux n116bge Date: Fri, 29 Mar 2019 20:17:57 +0100 Message-ID: <4434574.6rqfZtZq1D@diego> In-Reply-To: <20190328171710.31949-5-dianders@chromium.org> References: <20190328171710.31949-1-dianders@chromium.org> <20190328171710.31949-5-dianders@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8BIT Content-Type: text/plain; charset="iso-8859-1" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Donnerstag, 28. März 2019, 18:17:07 CET schrieb Douglas Anderson: > Convert the Innolux n116bge from using a fixed mode to specifying a > display timing with min/typ/max values. > > Note that the n116bge's datasheet doesn't fit too well into DRM's way > of specifying things. Specifically the panel's datasheet just > specifies the vertical blanking period and horizontal blanking period > and doesn't break things out. For now we'll leave everything as a > fixed value but just allow adjusting the pixel clock. I've added a > comment on what the datasheet claims so someone could later expand > things to fit their needs if they wanted to test other blanking > periods. > > The goal here is to be able to specify the panel timings in the device > tree for several rk3288 Chromebooks (like rk3288-veryon-jerry). These > Chromebooks have all been running in the downstream kernel with the > standard porches and sync lengths but just with a slightly slower > pixel clock because the 76.42 MHz clock is not achievable from the > fixed PLL that was available. These Chromebooks only achieve a > refresh rate of ~58 Hz. While it's probable that we could adjust the > timings to achieve 60 Hz it's probably wisest to match what's been > running on these devices all these years. > > I'll note that though the upstream kernel has always tried to achieve > 76.42 MHz, it has actually been running at 74.25 MHz also since the > video processor is parented off the same fixed PLL. > > Changes in v4: > - display_timing for Innolux n116bge new for v4. > > Signed-off-by: Douglas Anderson on a rk3288-jerry and rk3288-pinky Tested-by: Heiko Stuebner