From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9A004C54798 for ; Sat, 9 Mar 2024 03:34:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:Message-ID:References:In-Reply-To:Subject:Cc:To:From :Date:MIME-Version:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ii6mlhgwaSzXHz0aLZFqnuRaTygaTKq5KsjXH6xso7E=; b=3Gmh2bSU9SXag0INq4AXN6InwM tYVJ+7511cbcZkGYaU46ws4a3gqFiDWBreIDOkUfdfhf83eOQvkFK4d1ncK/Tg3DIJ1JGmIkYPqlY Mqk6UutOu9G0I9xBgnLMpZVjlGe19k2h6mQIaJQH+HXrUfuA00gSNgLSp8M6izmWiOgnfa6KVcSBv 9VZyxoQY+dwKFLOmhX9LN0iRB50F1Mm5YScRIRyR46K6ahFAgshV2eWpDsXzPJcjZbi1H6jl2yHEw rc4X0NXiWP7MsYtBcP9MaU5ZsXh8m8qfStjtQiE1payA+vdl1hbPTdaeNO/46hIUxWHw/j0xoOaXb V4W3vfjw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rinTM-0000000CI46-3I1E; Sat, 09 Mar 2024 03:34:08 +0000 Received: from mail.manjaro.org ([116.203.91.91]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rinTI-0000000CI36-0lPb; Sat, 09 Mar 2024 03:34:06 +0000 MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=manjaro.org; s=2021; t=1709955234; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=t4+I5353e+cI83JD2WcGGJqtPVJ5FDh69UyZW2V/aeo=; b=ITKjFB9jvpj8XRC3mtSfjw+iJ9midrzMwZA1bpEIkEtULBas3cnpGUMpFa40FgTPeLbeCR VkHd+hI3LY72CkH6j5cpc0Ej41VN1Aa9+ibHNZ57Uml5nGyhqbSYbHjC8tpIB7j/9s5OPz L8hIu+t//0jCSmuimCe9knSbfMKF5TqCnc+W9W1HNG3EVEw3npcN+pTSusmmYwSHWIQz4n NljdNgKe6YMc9bTHmLZg3Io3wlo8pQeDbja67VTxZBaJihDf7L2rtrGwTrHEdSwUCuenV9 /Qr5B06/vMNsozSIBFTAHZvhdU8uqKiwyZJLvKfSbF201mQxIQfsJNR/ndZpdw== Date: Sat, 09 Mar 2024 04:33:54 +0100 From: Dragan Simic To: Diederik de Haas Cc: linux-rockchip@lists.infradead.org, heiko@sntech.de, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, Anand Moon Subject: Re: [PATCH] arm64: dts: rockchip: Add cache information to the SoC dtsi for RK356x In-Reply-To: <90122541.GozVr7r7Y5@bagend> References: <2285ee41e165813011220f9469e28697923aa6e0.1709491108.git.dsimic@manjaro.org> <90122541.GozVr7r7Y5@bagend> Message-ID: <4447952c7487f7cfd4d4118bbbc1eed3@manjaro.org> X-Sender: dsimic@manjaro.org Authentication-Results: ORIGINATING; auth=pass smtp.auth=dsimic@manjaro.org smtp.mailfrom=dsimic@manjaro.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240308_193404_841579_350030A1 X-CRM114-Status: GOOD ( 13.37 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Hello Diederik, On 2024-03-08 23:48, Diederik de Haas wrote: > On Sunday, 3 March 2024 20:04:50 CET Dragan Simic wrote: >> Add missing cache information to the Rockchip RK356x SoC dtsi, to >> allow >> the userspace, which includes /proc/cpuinfo and lscpu(1), to present >> proper >> RK3566 and RK3568 cache information. Also, it gets rid of the >> following >> error in the kernel log: >> >> cacheinfo: Unable to detect cache hierarchy for CPU 0 > > I tried it out on my PineTab2 (rk3566) and while I didn't see any > change in > `/proc/cpuinfo`, I did see a/the change in `lscpu` and the above quoted > warning is now gone. Thanks :-) > > Tested-By: Diederik de Haas Thank you for testing the patch and for reporting the inaccuracy in the patch description! I'll reword the patch description a bit and send the v2. _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B2AE5C54E49 for ; Sat, 9 Mar 2024 03:34:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:Message-ID:References:In-Reply-To:Subject:Cc:To:From :Date:MIME-Version:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=x0bQ9lnnISC0EQbQS1GPD2635I+rT/fPNR7gcouE9ck=; b=gH1ZaWG3OcLStnCvvg/2Utky0H UjJLw/J0SUSACnvpx7980A3xzSXtyv5JpW67JdoAZjONf73TQsvmsocDJ/a4VQ1EQhcotJYtVo3rY B+b384COEMf6VueSNQZvax3dAa+FGdqMILLbJSDeO1Zs/OHWMdtAfQ7zUkkLxwLsiAsbS8JefX7kj Z3LlL1Ho686W7p9NBLqbQ/ZYuiMOF90vZwTSY56nbMZwU0cXSHwx2JijQplPHDmsqvgpgHaZs3Zl6 QIAyQqc8UpWh5G0ujRghoXJH9paMyNYVUBxwNT92Q58+83QuYLYU8AfEeLUuxczMLGqGCfsajF4Ke JtifyjFQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rinTM-0000000CI40-0LBm; Sat, 09 Mar 2024 03:34:08 +0000 Received: from mail.manjaro.org ([116.203.91.91]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rinTI-0000000CI36-0lPb; Sat, 09 Mar 2024 03:34:06 +0000 MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=manjaro.org; s=2021; t=1709955234; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=t4+I5353e+cI83JD2WcGGJqtPVJ5FDh69UyZW2V/aeo=; b=ITKjFB9jvpj8XRC3mtSfjw+iJ9midrzMwZA1bpEIkEtULBas3cnpGUMpFa40FgTPeLbeCR VkHd+hI3LY72CkH6j5cpc0Ej41VN1Aa9+ibHNZ57Uml5nGyhqbSYbHjC8tpIB7j/9s5OPz L8hIu+t//0jCSmuimCe9knSbfMKF5TqCnc+W9W1HNG3EVEw3npcN+pTSusmmYwSHWIQz4n NljdNgKe6YMc9bTHmLZg3Io3wlo8pQeDbja67VTxZBaJihDf7L2rtrGwTrHEdSwUCuenV9 /Qr5B06/vMNsozSIBFTAHZvhdU8uqKiwyZJLvKfSbF201mQxIQfsJNR/ndZpdw== Date: Sat, 09 Mar 2024 04:33:54 +0100 From: Dragan Simic To: Diederik de Haas Cc: linux-rockchip@lists.infradead.org, heiko@sntech.de, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, Anand Moon Subject: Re: [PATCH] arm64: dts: rockchip: Add cache information to the SoC dtsi for RK356x In-Reply-To: <90122541.GozVr7r7Y5@bagend> References: <2285ee41e165813011220f9469e28697923aa6e0.1709491108.git.dsimic@manjaro.org> <90122541.GozVr7r7Y5@bagend> Message-ID: <4447952c7487f7cfd4d4118bbbc1eed3@manjaro.org> X-Sender: dsimic@manjaro.org Authentication-Results: ORIGINATING; auth=pass smtp.auth=dsimic@manjaro.org smtp.mailfrom=dsimic@manjaro.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240308_193404_841579_350030A1 X-CRM114-Status: GOOD ( 13.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hello Diederik, On 2024-03-08 23:48, Diederik de Haas wrote: > On Sunday, 3 March 2024 20:04:50 CET Dragan Simic wrote: >> Add missing cache information to the Rockchip RK356x SoC dtsi, to >> allow >> the userspace, which includes /proc/cpuinfo and lscpu(1), to present >> proper >> RK3566 and RK3568 cache information. Also, it gets rid of the >> following >> error in the kernel log: >> >> cacheinfo: Unable to detect cache hierarchy for CPU 0 > > I tried it out on my PineTab2 (rk3566) and while I didn't see any > change in > `/proc/cpuinfo`, I did see a/the change in `lscpu` and the above quoted > warning is now gone. Thanks :-) > > Tested-By: Diederik de Haas Thank you for testing the patch and for reporting the inaccuracy in the patch description! I'll reword the patch description a bit and send the v2. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.manjaro.org (mail.manjaro.org [116.203.91.91]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 74B4B12E5B for ; Sat, 9 Mar 2024 03:33:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=116.203.91.91 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709955241; cv=none; b=c7afIepFDBaTBwcH4NmGgTAQDQbY42yv+JRqZv/L5D8AI0fxqK9OiRnsnhcddRkfYvlvC4VlHU1r30YMgNKZoAFV8pVEgDutbPBnJuNcmcfTWZIFPoHy9c3HJ9W80gg4gJMJhUylI3vbbbu7LD8oJt18C0mISdBZA+cZX7+MXOo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709955241; c=relaxed/simple; bh=ctWupuRrZpygeCuXAhI2gQJfipocNsiap8VYSrpyYuU=; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:Content-Type; b=r9yzdfz3pPINIdH+l70NRHEfWoSn6CurCwHmavb7JzUx3DS06h7+H3zD/44Rd5jWMzxfFzklRamAVippIGrC20p3KkMCj9/KC2NvdmVEeEw926EikKc/9m+sEveJk3gR5ASRwyANlfwq7OCEPgNj9TMSmCgbcemZOf2AnCdkhtQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=manjaro.org; spf=pass smtp.mailfrom=manjaro.org; dkim=pass (2048-bit key) header.d=manjaro.org header.i=@manjaro.org header.b=ITKjFB9j; arc=none smtp.client-ip=116.203.91.91 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=manjaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=manjaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=manjaro.org header.i=@manjaro.org header.b="ITKjFB9j" Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=manjaro.org; s=2021; t=1709955234; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=t4+I5353e+cI83JD2WcGGJqtPVJ5FDh69UyZW2V/aeo=; b=ITKjFB9jvpj8XRC3mtSfjw+iJ9midrzMwZA1bpEIkEtULBas3cnpGUMpFa40FgTPeLbeCR VkHd+hI3LY72CkH6j5cpc0Ej41VN1Aa9+ibHNZ57Uml5nGyhqbSYbHjC8tpIB7j/9s5OPz L8hIu+t//0jCSmuimCe9knSbfMKF5TqCnc+W9W1HNG3EVEw3npcN+pTSusmmYwSHWIQz4n NljdNgKe6YMc9bTHmLZg3Io3wlo8pQeDbja67VTxZBaJihDf7L2rtrGwTrHEdSwUCuenV9 /Qr5B06/vMNsozSIBFTAHZvhdU8uqKiwyZJLvKfSbF201mQxIQfsJNR/ndZpdw== Date: Sat, 09 Mar 2024 04:33:54 +0100 From: Dragan Simic To: Diederik de Haas Cc: linux-rockchip@lists.infradead.org, heiko@sntech.de, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, Anand Moon Subject: Re: [PATCH] arm64: dts: rockchip: Add cache information to the SoC dtsi for RK356x In-Reply-To: <90122541.GozVr7r7Y5@bagend> References: <2285ee41e165813011220f9469e28697923aa6e0.1709491108.git.dsimic@manjaro.org> <90122541.GozVr7r7Y5@bagend> Message-ID: <4447952c7487f7cfd4d4118bbbc1eed3@manjaro.org> X-Sender: dsimic@manjaro.org Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Authentication-Results: ORIGINATING; auth=pass smtp.auth=dsimic@manjaro.org smtp.mailfrom=dsimic@manjaro.org Hello Diederik, On 2024-03-08 23:48, Diederik de Haas wrote: > On Sunday, 3 March 2024 20:04:50 CET Dragan Simic wrote: >> Add missing cache information to the Rockchip RK356x SoC dtsi, to >> allow >> the userspace, which includes /proc/cpuinfo and lscpu(1), to present >> proper >> RK3566 and RK3568 cache information. Also, it gets rid of the >> following >> error in the kernel log: >> >> cacheinfo: Unable to detect cache hierarchy for CPU 0 > > I tried it out on my PineTab2 (rk3566) and while I didn't see any > change in > `/proc/cpuinfo`, I did see a/the change in `lscpu` and the above quoted > warning is now gone. Thanks :-) > > Tested-By: Diederik de Haas Thank you for testing the patch and for reporting the inaccuracy in the patch description! I'll reword the patch description a bit and send the v2.