From: Krzysztof Kozlowski <krzk@kernel.org>
To: Conor Dooley <conor@kernel.org>, devicetree@vger.kernel.org
Cc: Conor Dooley <conor.dooley@microchip.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Nicolas Ferre <nicolas.ferre@microchip.com>,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
Claudiu Beznea <claudiu.beznea@tuxon.dev>,
Lars Povlsen <lars.povlsen@microchip.com>,
Steen Hegelund <Steen.Hegelund@microchip.com>,
Daniel Machon <daniel.machon@microchip.com>
Subject: Re: [PATCH 2/2] MAINTAINERS: add cache binding directory to cache driver entry
Date: Thu, 27 Jun 2024 09:38:16 +0200 [thread overview]
Message-ID: <44574fda-43e4-426a-8e50-3f28ead2d783@kernel.org> (raw)
In-Reply-To: <20240626-rebate-hertz-6d944eee7dda@spud>
On 26/06/2024 17:54, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> The directory covering cache controller bindings has no MAINTAINER other
> than the fallback to myself, Rob and Krzysztof. Add it to the entry for
> the corresponding drivers.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
next prev parent reply other threads:[~2024-06-27 7:38 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-26 15:54 [PATCH 1/2] MAINTAINERS: add microchip soc binding directory to microchip soc driver entry Conor Dooley
2024-06-26 15:54 ` [PATCH 2/2] MAINTAINERS: add cache binding directory to cache " Conor Dooley
2024-06-27 7:38 ` Krzysztof Kozlowski [this message]
2024-06-26 16:10 ` [PATCH 1/2] MAINTAINERS: add microchip soc binding directory to microchip soc " Conor Dooley
2024-06-27 7:35 ` Nicolas Ferre
2024-06-27 7:38 ` Krzysztof Kozlowski
2024-06-27 16:28 ` Conor Dooley
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