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From: Fabrice Bellard <fabrice@bellard.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] MIPS interrupt handling
Date: Wed, 03 May 2006 00:28:47 +0200	[thread overview]
Message-ID: <4457DD1F.7040307@bellard.org> (raw)

I just looked at the MIPS file target-mips/op_helper.c and I don't 
understand why IRQs need to be handled in op_helper.c:do_mtc0() with reg 
= 12. IMHO, the corresponding code should be deleted because the TB is 
forced to terminate after mtc0 so that the IRQs can be handled in the 
main loop in cpu-exec.c.

Moreover, clearing CPU_INTERRUPT_HARD in do_mtc0() is almost surely a bug !

Fabrice.

             reply	other threads:[~2006-05-02 22:29 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2006-05-02 22:28 Fabrice Bellard [this message]
2006-05-02 23:44 ` [Qemu-devel] MIPS interrupt handling Thiemo Seufer
2006-05-03 19:15   ` Fabrice Bellard
2006-05-03 19:52     ` Thiemo Seufer

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