From: Sergei Shtylyov <sshtylyov@ru.mvista.com>
To: Rodolfo Giometti <giometti@linux.it>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Subject: Re: Porting Au1x000 USB host controller on u-boot
Date: Thu, 04 May 2006 21:26:49 +0400 [thread overview]
Message-ID: <445A3959.3050906@ru.mvista.com> (raw)
In-Reply-To: <20060504172131.GF7357@gundam.enneenne.com>
Hello.
Rodolfo Giometti wrote:
>> AND make sure every buffer/TD/ED is written back / invalidated from
>> cache before the OHCI accesses them since the cache coherency on Au1xx0 is
>>b0rken!
Or, better yet, access TD/ED (and, if possible, the buffers) via uncached
KSEG1 only.
> Mmm... good suggestion! :) How can I invalidated the cache? Can you
> please show me some example code?
Dig in arch/mips/mm/c-r4k.c...
> Thanks _a lot_!
>
> Rodolfo
WBR, Sergei
prev parent reply other threads:[~2006-05-04 17:28 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-05-04 9:53 Porting Au1x000 USB host controller on u-boot Rodolfo Giometti
2006-05-04 17:06 ` Sergei Shtylyov
2006-05-04 17:10 ` Sergei Shtylyov
2006-05-04 17:16 ` Sergei Shtylyov
2006-05-04 17:16 ` Sergei Shtylyov
2006-05-04 17:21 ` Rodolfo Giometti
2006-05-04 17:26 ` Sergei Shtylyov [this message]
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