Re: Issues with AHCI and SATAII using JMD360

[Tejun Heo <htejun@gmail.com>]

Moritz Heiber wrote:
> <...>
> PCI: Setting latency timer of device 0000:03:00.0 to 64
> ahci 0000:03:00.0: AHCI 0001.0000 32 slots 1 ports 3 Gbps 0x1 impl SATA mode
> ahci 0000:03:00.0: flags: 64bit ncq pm led clo pmp pio slum part 
> ata1: SATA max UDMA/133 cmd 0xF8814100 ctl 0x0 bmdma 0x0 irq 5
> <...>
> ata1: SATA link up 1.5 (SStatus 113 SControl 300)
> ata1: dev 0 cfg 49:2f00 82:346b 83:7fe9 84:4773 85:3469 86:3c01 87:4763 88:407f
> ata1: dev 0 ATA-7, max UDMA/133, 321672960 sectors: LBA48
> ata1: dev 0 configured for UDMA/133
> scsi0 : ahci
>   Vendor: ATA       Model: HDT722516DLA380   Rev: V43O
>   Type:   Direct-Access                      ANSI SCSI revision: 05
> ------
> 
> I guess the Scontrol value of 300 is .. good?

The digit in the middle is the SPD limit and 0 means no limit.  Hmm... 
wait, this is a hitachi disk.  Have you tried the feature tool?  Hitachi 
limits the spd of the harddrive tso 1.5 gbps, probably for compatibility 
reasons, and allows users to enable it with the feature tool.

http://www.hitachigst.com/hdd/support/download.htm#FeatureTool

* ....
* Configure SATA interface - adjust maximum speed and enable/disable 
Spread Spectrum Clocking.

> 
> I had to adjust your patch since it didn't apply to my 2.6.16.14 kernel.
> The "corrected" patch is attached. I think I pretty much retained the
> functionality you intended it to have.
> 
> Given your patch though .. your git-based code looks much simpler. I
> wonder if that is a good or a bad thing and wether I should try a more
> recent kernel .. (?)

The patch was pulled from libata devel tree.  I was being lazy again and 
didn't test it on 2.6.16.14.  :p  However, I can assure you libata 
doesn't play much role in PHY spd configuration.

-- 
tejun