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From: Jason Wessel <jason.wessel@windriver.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 2/5] PPC Breakpoints for gdb-stub
Date: Sat, 20 May 2006 16:01:20 -0500	[thread overview]
Message-ID: <446F83A0.4000205@windriver.com> (raw)

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This patch adds breakpoint and single stepping support for PPC via the 
gdb stub.

signed-off-by: jason.wessel@windriver.com

Jason.

[-- Attachment #2: ppc_breakpoints.patch --]
[-- Type: text/plain, Size: 2587 bytes --]

Index: qemu/target-ppc/translate.c
===================================================================
--- qemu.orig/target-ppc/translate.c
+++ qemu/target-ppc/translate.c
@@ -148,6 +148,7 @@ typedef struct DisasContext {
 #endif
     int fpu_enabled;
     ppc_spr_t *spr_cb; /* Needed to check rights for mfspr/mtspr */
+    int singlestep_enabled;
 } DisasContext;
 
 struct opc_handler_t {
@@ -1738,10 +1739,14 @@ static inline void gen_goto_tb(DisasCont
         gen_op_set_T1(dest);
         gen_op_b_T1();
         gen_op_set_T0((long)tb + n);
+        if (ctx->singlestep_enabled)
+            gen_op_debug();
         gen_op_exit_tb();
     } else {
         gen_op_set_T1(dest);
         gen_op_b_T1();
+        if (ctx->singlestep_enabled)
+            gen_op_debug();
         gen_op_set_T0(0);
         gen_op_exit_tb();
     }
@@ -2520,12 +2525,22 @@ int gen_intermediate_code_internal (CPUS
     ctx.mem_idx = ((1 - msr_pr) << 1) | msr_le;
 #endif
     ctx.fpu_enabled = msr_fp;
+    ctx.singlestep_enabled = env->singlestep_enabled;
 #if defined (DO_SINGLE_STEP) && 0
     /* Single step trace mode */
     msr_se = 1;
 #endif
     /* Set env in case of segfault during code fetch */
     while (ctx.exception == EXCP_NONE && gen_opc_ptr < gen_opc_end) {
+        if (env->nb_breakpoints > 0) {
+            for(j = 0; j < env->nb_breakpoints; j++) {
+                if (env->breakpoints[j] == ctx.nip) {
+                    gen_op_update_nip(ctx.nip); 
+                    gen_op_debug();
+                    break;
+                }
+            }
+        }
         if (search_pc) {
             j = gen_opc_ptr - gen_opc_buf;
             if (lj < j) {
@@ -2616,8 +2631,12 @@ int gen_intermediate_code_internal (CPUS
              ctx.exception != EXCP_TRAP)) {
             RET_EXCP(ctxp, EXCP_TRACE, 0);
         }
-        /* if we reach a page boundary, stop generation */
-        if ((ctx.nip & (TARGET_PAGE_SIZE - 1)) == 0) {
+
+        /* if we reach a page boundary or are single stepping, stop
+         * generation
+         */
+        if (((ctx.nip & (TARGET_PAGE_SIZE - 1)) == 0) ||
+            (env->singlestep_enabled)) {
             break;
     }
 #if defined (DO_SINGLE_STEP)
Index: qemu/target-ppc/op.c
===================================================================
--- qemu.orig/target-ppc/op.c
+++ qemu/target-ppc/op.c
@@ -204,6 +204,11 @@ PPC_OP(update_nip)
     env->nip = PARAM(1);
 }
 
+PPC_OP(debug)
+{
+    do_raise_exception(EXCP_DEBUG);
+}
+
 /* Segment registers load and store with immediate index */
 PPC_OP(load_srin)
 {

                 reply	other threads:[~2006-05-20 21:01 UTC|newest]

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