From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from motgate3.mot.com (motgate3.mot.com [144.189.100.103]) by ozlabs.org (Postfix) with ESMTP id AA3D567B1B for ; Thu, 1 Jun 2006 05:02:20 +1000 (EST) Received: from az33exr02.mot.com (az33exr02.mot.com [10.64.251.232]) by motgate3.mot.com (8.12.11/Motgate3) with ESMTP id k4VJ2ILj006250 for ; Wed, 31 May 2006 12:02:18 -0700 (MST) Received: from de01exm68.ds.mot.com (de01exm68.am.mot.com [10.176.8.24]) by az33exr02.mot.com (8.13.1/8.13.0) with ESMTP id k4VJ2HDw019600 for ; Wed, 31 May 2006 14:02:18 -0500 (CDT) MIME-Version: 1.0 Content-Type: multipart/alternative; boundary="----_=_NextPart_001_01C684E4.BA6F73B9" Subject: Linux 2.4 Kernel on Xilinx Virtex4 FX100's PPC Date: Wed, 31 May 2006 15:02:14 -0400 Message-ID: From: "Anantharaman Chetan-W16155" To: List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , This is a multi-part message in MIME format. ------_=_NextPart_001_01C684E4.BA6F73B9 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Has anyone successfully ported a Linux 2.4 Kernel on a Xilinx Virtex-4 FX series FPGA's, PPC405 processor? =20 More specifically, the FX100 FPGA? =20 Thanks, Chetan ------_=_NextPart_001_01C684E4.BA6F73B9 Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

Has anyone successfully ported a Linux 2.4 Kernel on = a Xilinx Virtex-4 FX series FPGA’s, PPC405 = processor?

More specifically, the FX100 = FPGA?

Thanks,

Chetan

------_=_NextPart_001_01C684E4.BA6F73B9-- From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from nf-out-0910.google.com (nf-out-0910.google.com [64.233.182.191]) by ozlabs.org (Postfix) with ESMTP id 134CD67B17 for ; Thu, 1 Jun 2006 05:35:23 +1000 (EST) Received: by nf-out-0910.google.com with SMTP id k26so189859nfc for ; Wed, 31 May 2006 12:35:21 -0700 (PDT) Message-ID: <528646bc0605311235n171f889g135e074685b578bc@mail.gmail.com> Date: Wed, 31 May 2006 13:35:21 -0600 From: "Grant Likely" Sender: glikely@gmail.com To: "Anantharaman Chetan-W16155" Subject: Re: Linux 2.4 Kernel on Xilinx Virtex4 FX100's PPC In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed References: Cc: linuxppc-embedded@ozlabs.org List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On 5/31/06, Anantharaman Chetan-W16155 wrote: > > Has anyone successfully ported a Linux 2.4 Kernel on a Xilinx Virtex-4 FX > series FPGA's, PPC405 processor? Linux on the V4-FX is well supported. Xilinx has an app node describing how to modify the linuxppc-2.4 tree to work on the V4-FX. You can find out how to get the tree here: http://www.penguinppc.org/kernel/ I've got both 2.4 & 2.6 happily running on my ML403 board here. Cheers, g. -- Grant Likely, B.Sc. P.Eng. Secret Lab Technologies Ltd. grant.likely@secretlab.ca (403) 399-0195 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from motgate4.mot.com (motgate4.mot.com [144.189.100.102]) by ozlabs.org (Postfix) with ESMTP id BF3CC679E1 for ; Thu, 1 Jun 2006 07:47:34 +1000 (EST) Received: from az33exr03.mot.com (az33exr03.mot.com [10.64.251.233]) by motgate4.mot.com (8.12.11/Motgate4) with ESMTP id k4VLlWQ0001363 for ; Wed, 31 May 2006 14:47:32 -0700 (MST) Received: from de01exm68.ds.mot.com (de01exm68.am.mot.com [10.176.8.24]) by az33exr03.mot.com (8.13.1/8.13.0) with ESMTP id k4VLlVGx004774 for ; Wed, 31 May 2006 16:47:32 -0500 (CDT) MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Subject: RE: Linux 2.4 Kernel on Xilinx Virtex4 FX100's PPC Date: Wed, 31 May 2006 17:47:31 -0400 Message-ID: In-Reply-To: <528646bc0605311235n171f889g135e074685b578bc@mail.gmail.com> From: "Anantharaman Chetan-W16155" To: "Grant Likely" Cc: linuxppc-embedded@ozlabs.org List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Was the port done on a FX100 FPGA? Also, what PVR number does the PPC405 indicate? Thanks, Chetan -----Original Message----- From: glikely@gmail.com [mailto:glikely@gmail.com] On Behalf Of Grant Likely Sent: Wednesday, May 31, 2006 2:35 PM To: Anantharaman Chetan-W16155 Cc: linuxppc-embedded@ozlabs.org Subject: Re: Linux 2.4 Kernel on Xilinx Virtex4 FX100's PPC On 5/31/06, Anantharaman Chetan-W16155 wrote: > > Has anyone successfully ported a Linux 2.4 Kernel on a Xilinx Virtex-4 FX > series FPGA's, PPC405 processor? Linux on the V4-FX is well supported. Xilinx has an app node describing how to modify the linuxppc-2.4 tree to work on the V4-FX. You can find out how to get the tree here: http://www.penguinppc.org/kernel/ I've got both 2.4 & 2.6 happily running on my ML403 board here. Cheers, g. --=20 Grant Likely, B.Sc. P.Eng. Secret Lab Technologies Ltd. grant.likely@secretlab.ca (403) 399-0195 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail09.syd.optusnet.com.au (mail09.syd.optusnet.com.au [211.29.132.190]) (using TLSv1 with cipher EDH-RSA-DES-CBC3-SHA (168/168 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTP id 7E4EB67A79 for ; Thu, 1 Jun 2006 08:22:33 +1000 (EST) Message-ID: <447E1725.4010908@nicta.com.au> Date: Thu, 01 Jun 2006 08:22:29 +1000 From: Aidan Williams MIME-Version: 1.0 To: Anantharaman Chetan-W16155 Subject: Re: Linux 2.4 Kernel on Xilinx Virtex4 FX100's PPC References: In-Reply-To: Content-Type: text/plain; charset=windows-1252; format=flowed Cc: linuxppc-embedded@ozlabs.org List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Anantharaman Chetan-W16155 wrote: > Has anyone successfully ported a Linux 2.4 Kernel on a Xilinx Virtex-4 > FX series FPGA’s, PPC405 processor? > Yes, see http://ozlabs.org/pipermail/linuxppc-embedded/2006-April/022583.html Note that there are silicon bugs that prevent caches being used in some chips. > More specifically, the FX100 FPGA? I don't have one of those, sorry. - aidan From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from nf-out-0910.google.com (nf-out-0910.google.com [64.233.182.186]) by ozlabs.org (Postfix) with ESMTP id AAF6E67B18 for ; Thu, 1 Jun 2006 08:33:48 +1000 (EST) Received: by nf-out-0910.google.com with SMTP id l23so258479nfc for ; Wed, 31 May 2006 15:33:46 -0700 (PDT) Message-ID: <528646bc0605311533u147797fdhd5178420bc2f0b4b@mail.gmail.com> Date: Wed, 31 May 2006 16:33:46 -0600 From: "Grant Likely" Sender: glikely@gmail.com To: "Anantharaman Chetan-W16155" Subject: Re: Linux 2.4 Kernel on Xilinx Virtex4 FX100's PPC In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed References: <528646bc0605311235n171f889g135e074685b578bc@mail.gmail.com> Cc: linuxppc-embedded@ozlabs.org List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On 5/31/06, Anantharaman Chetan-W16155 wrote: > Was the port done on a FX100 FPGA? No; but AFAIK, the ppc hardcore is identical for all FX parts. The FX100 shoudn't be a problem. > Also, what PVR number does the PPC405 indicate? Core#0>rd pvr pvr: 0x20011430 536941616 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from motgate3.mot.com (motgate3.mot.com [144.189.100.103]) by ozlabs.org (Postfix) with ESMTP id E540C67B2A for ; Thu, 1 Jun 2006 09:14:23 +1000 (EST) Received: from az33exr04.mot.com (az33exr04.mot.com [10.64.251.234]) by motgate3.mot.com (8.12.11/Motgate3) with ESMTP id k4VNEM67029092 for ; Wed, 31 May 2006 16:14:22 -0700 (MST) Received: from de01exm68.ds.mot.com (de01exm68.am.mot.com [10.176.8.24]) by az33exr04.mot.com (8.13.1/8.13.0) with ESMTP id k4VNELUn008246 for ; Wed, 31 May 2006 18:14:21 -0500 (CDT) MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Subject: RE: Linux 2.4 Kernel on Xilinx Virtex4 FX100's PPC Date: Wed, 31 May 2006 19:14:20 -0400 Message-ID: In-Reply-To: <528646bc0605311235n171f889g135e074685b578bc@mail.gmail.com> From: "Anantharaman Chetan-W16155" To: "Grant Likely" Cc: linuxppc-embedded@ozlabs.org List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Grant,=20 Can you please provide a link or perhaps point me to the app node that Xilinx has to modify linuxppc-2.4 tree for V4-FX. Thanks,=20 Chetan -----Original Message----- From: glikely@gmail.com [mailto:glikely@gmail.com] On Behalf Of Grant Likely Sent: Wednesday, May 31, 2006 2:35 PM To: Anantharaman Chetan-W16155 Cc: linuxppc-embedded@ozlabs.org Subject: Re: Linux 2.4 Kernel on Xilinx Virtex4 FX100's PPC On 5/31/06, Anantharaman Chetan-W16155 wrote: > > Has anyone successfully ported a Linux 2.4 Kernel on a Xilinx Virtex-4 FX > series FPGA's, PPC405 processor? Linux on the V4-FX is well supported. Xilinx has an app node describing how to modify the linuxppc-2.4 tree to work on the V4-FX. You can find out how to get the tree here: http://www.penguinppc.org/kernel/ I've got both 2.4 & 2.6 happily running on my ML403 board here. Cheers, g. --=20 Grant Likely, B.Sc. P.Eng. Secret Lab Technologies Ltd. grant.likely@secretlab.ca (403) 399-0195 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from outbound1-cpk-R.bigfish.com (outbound-cpk.frontbridge.com [207.46.163.16]) (using TLSv1 with cipher EDH-RSA-DES-CBC3-SHA (168/168 bits)) (Client CN "*.bigfish.com", Issuer "*.bigfish.com" (not verified)) by ozlabs.org (Postfix) with ESMTP id 3445267A58 for ; Fri, 2 Jun 2006 03:06:02 +1000 (EST) Message-ID: <447F1E48.10808@xilinx.com> Date: Thu, 01 Jun 2006 10:05:12 -0700 From: Peter Ryser MIME-Version: 1.0 To: Aidan Williams Subject: Re: Linux 2.4 Kernel on Xilinx Virtex4 FX100's PPC References: <447E1725.4010908@nicta.com.au> In-Reply-To: <447E1725.4010908@nicta.com.au> Content-Type: text/plain; charset=windows-1252; format=flowed Cc: Anantharaman Chetan-W16155 , linuxppc-embedded@ozlabs.org List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , There are some silicon issues on the PPC405 in V4 with PVR 0x20011430=20 which are documented in Xilinx solution record 20658. All these issues=20 are fixed in silicon where the PPC405 has a PVR of 0x20011470. Said that it's not true that the caches cannot be used in silicon with=20 PVR 0x20011430. The problem is a corner case which does not show in=20 typical designs. - Peter Aidan Williams wrote: >Anantharaman Chetan-W16155 wrote: > =20 > >>Has anyone successfully ported a Linux 2.4 Kernel on a Xilinx Virtex-4=20 >>FX series FPGA=92s, PPC405 processor? >> >> =20 >> > >Yes, see=20 >http://ozlabs.org/pipermail/linuxppc-embedded/2006-April/022583.html > >Note that there are silicon bugs that prevent caches being used in some=20 >chips. > > =20 > >>More specifically, the FX100 FPGA? >> =20 >> > >I don't have one of those, sorry. > >- aidan > >_______________________________________________ >Linuxppc-embedded mailing list >Linuxppc-embedded@ozlabs.org >https://ozlabs.org/mailman/listinfo/linuxppc-embedded > > > =20 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from nf-out-0910.google.com (nf-out-0910.google.com [64.233.182.189]) by ozlabs.org (Postfix) with ESMTP id 365A167A70 for ; Fri, 2 Jun 2006 03:11:03 +1000 (EST) Received: by nf-out-0910.google.com with SMTP id l36so606827nfa for ; Thu, 01 Jun 2006 10:11:01 -0700 (PDT) Message-ID: <528646bc0606011008o35096b43p42cc6aa9c0002f8c@mail.gmail.com> Date: Thu, 1 Jun 2006 11:08:43 -0600 From: "Grant Likely" Sender: glikely@gmail.com To: "Peter Ryser" Subject: Re: Linux 2.4 Kernel on Xilinx Virtex4 FX100's PPC In-Reply-To: <447F1E48.10808@xilinx.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed References: <447E1725.4010908@nicta.com.au> <447F1E48.10808@xilinx.com> Cc: Anantharaman Chetan-W16155 , linuxppc-embedded@ozlabs.org List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On 6/1/06, Peter Ryser wrote: > There are some silicon issues on the PPC405 in V4 with PVR 0x20011430 > which are documented in Xilinx solution record 20658. All these issues > are fixed in silicon where the PPC405 has a PVR of 0x20011470. > > Said that it's not true that the caches cannot be used in silicon with > PVR 0x20011430. The problem is a corner case which does not show in > typical designs. If I understand correctly, the cache issue only shows up with RAM attached to the OPB (instead of PLB). Is that correct? Cheers, g. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from outbound2-cpk-R.bigfish.com (outbound-cpk.frontbridge.com [207.46.163.16]) (using TLSv1 with cipher EDH-RSA-DES-CBC3-SHA (168/168 bits)) (Client CN "*.bigfish.com", Issuer "*.bigfish.com" (not verified)) by ozlabs.org (Postfix) with ESMTP id 8DB0367A70 for ; Fri, 2 Jun 2006 03:23:31 +1000 (EST) Message-ID: <447F1D0E.2010002@xilinx.com> Date: Thu, 01 Jun 2006 09:59:58 -0700 From: Peter Ryser MIME-Version: 1.0 To: Anantharaman Chetan-W16155 Subject: Re: Linux 2.4 Kernel on Xilinx Virtex4 FX100's PPC References: In-Reply-To: Content-Type: text/plain; charset=us-ascii; format=flowed Cc: linuxppc-embedded@ozlabs.org List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , We have Linux up and running on the Virtex-4 FX100. The PVR for the PPC405 in all FX100 is 0x20011470. - Peter Anantharaman Chetan-W16155 wrote: >Was the port done on a FX100 FPGA? Also, what PVR number does the PPC405 >indicate? >Thanks, >Chetan > >-----Original Message----- >From: glikely@gmail.com [mailto:glikely@gmail.com] On Behalf Of Grant >Likely >Sent: Wednesday, May 31, 2006 2:35 PM >To: Anantharaman Chetan-W16155 >Cc: linuxppc-embedded@ozlabs.org >Subject: Re: Linux 2.4 Kernel on Xilinx Virtex4 FX100's PPC > >On 5/31/06, Anantharaman Chetan-W16155 > wrote: > > >>Has anyone successfully ported a Linux 2.4 Kernel on a Xilinx Virtex-4 >> >> >FX > > >>series FPGA's, PPC405 processor? >> >> > >Linux on the V4-FX is well supported. Xilinx has an app node >describing how to modify the linuxppc-2.4 tree to work on the V4-FX. >You can find out how to get the tree here: > >http://www.penguinppc.org/kernel/ >I've got both 2.4 & 2.6 happily running on my ML403 board here. > >Cheers, >g. > > > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from outbound2-cpk-R.bigfish.com (outbound-cpk.frontbridge.com [207.46.163.16]) (using TLSv1 with cipher EDH-RSA-DES-CBC3-SHA (168/168 bits)) (Client CN "*.bigfish.com", Issuer "*.bigfish.com" (not verified)) by ozlabs.org (Postfix) with ESMTP id D18C167A77 for ; Fri, 2 Jun 2006 04:04:36 +1000 (EST) Message-ID: <447F2C0E.1000306@xilinx.com> Date: Thu, 01 Jun 2006 11:03:58 -0700 From: Peter Ryser MIME-Version: 1.0 To: Grant Likely Subject: Re: Linux 2.4 Kernel on Xilinx Virtex4 FX100's PPC References: <447E1725.4010908@nicta.com.au> <447F1E48.10808@xilinx.com> <528646bc0606011008o35096b43p42cc6aa9c0002f8c@mail.gmail.com> In-Reply-To: <528646bc0606011008o35096b43p42cc6aa9c0002f8c@mail.gmail.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Cc: Anantharaman Chetan-W16155 , linuxppc-embedded@ozlabs.org List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , It's a little bit more complicated than that but your statement is basically correct. - Peter Grant Likely wrote: > On 6/1/06, Peter Ryser wrote: > >> There are some silicon issues on the PPC405 in V4 with PVR 0x20011430 >> which are documented in Xilinx solution record 20658. All these issues >> are fixed in silicon where the PPC405 has a PVR of 0x20011470. >> >> Said that it's not true that the caches cannot be used in silicon with >> PVR 0x20011430. The problem is a corner case which does not show in >> typical designs. > > > If I understand correctly, the cache issue only shows up with RAM > attached to the OPB (instead of PLB). Is that correct? > > Cheers, > g. > > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from murano.lizardlogic.co.uk (unknown [195.10.246.108]) by ozlabs.org (Postfix) with ESMTP id 6A3BA67B1C for ; Tue, 13 Jun 2006 03:19:03 +1000 (EST) Received: from [192.168.1.42] (horatio.newtec.dk [80.198.224.34]) by murano.lizardlogic.co.uk (Postfix) with ESMTP id 8C1721000BA for ; Mon, 12 Jun 2006 17:57:28 +0100 (BST) Mime-Version: 1.0 (Apple Message framework v624) In-Reply-To: <447F2C0E.1000306@xilinx.com> References: <447E1725.4010908@nicta.com.au> <447F1E48.10808@xilinx.com> <528646bc0606011008o35096b43p42cc6aa9c0002f8c@mail.gmail.com> <447F2C0E.1000306@xilinx.com> Content-Type: text/plain; charset=US-ASCII; format=flowed Message-Id: <3843e543d6792dd2752c060ad597194f@lizardlogic.co.uk> From: Stephen Telfer Subject: Re: Linux 2.4 Kernel on Xilinx Virtex4 FX100's PPC Date: Mon, 12 Jun 2006 17:57:27 +0100 To: linuxppc-embedded@ozlabs.org List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , I have been working on an FX60 part with PVR 0x20011430. It has memory attached to the PLB. I have noticed some possible corruptions during linux kernel boot that appear to follow a pattern. If a variable is stored immediately before a function call is made or returns, the callee/caller when reading the value gets stale data. Print the value of the variable in-between and coherency returns. Does that sound like a known problem? I went through the errata on solution record 20658 but nothing looked like a good fit. So I'm assuming at the moment it's some stupid bug of my own... Any suggestions gratefully appreciated. Regards, Stig Telfer On 1 Jun 2006, at 19:03, Peter Ryser wrote: > It's a little bit more complicated than that but your statement is > basically correct. > > - Peter > > > Grant Likely wrote: > >> On 6/1/06, Peter Ryser wrote: >> >>> There are some silicon issues on the PPC405 in V4 with PVR 0x20011430 >>> which are documented in Xilinx solution record 20658. All these >>> issues >>> are fixed in silicon where the PPC405 has a PVR of 0x20011470. >>> >>> Said that it's not true that the caches cannot be used in silicon >>> with >>> PVR 0x20011430. The problem is a corner case which does not show in >>> typical designs. >> >> >> If I understand correctly, the cache issue only shows up with RAM >> attached to the OPB (instead of PLB). Is that correct? >> >> Cheers, >> g. >> >> > > > > _______________________________________________ > Linuxppc-embedded mailing list > Linuxppc-embedded@ozlabs.org > https://ozlabs.org/mailman/listinfo/linuxppc-embedded