From mboxrd@z Thu Jan  1 00:00:00 1970
From: Heiko Stuebner <heiko@sntech.de>
Subject: Re: [PATCH v2 6/8] arm64: dts: rockchip: rk3399: Correct MIPI DPHY
 PLL clock
Date: Tue, 26 Sep 2017 16:00:52 +0200
Message-ID: <4487028.9zWcgLXlOk@phil>
References: <1506412523-1766-1-git-send-email-nickey.yang@rock-chips.com>
 <1506412523-1766-6-git-send-email-nickey.yang@rock-chips.com>
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From mboxrd@z Thu Jan  1 00:00:00 1970
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From: Heiko Stuebner <heiko@sntech.de>
To: Nickey Yang <nickey.yang@rock-chips.com>
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Subject: Re: [PATCH v2 6/8] arm64: dts: rockchip: rk3399: Correct MIPI DPHY PLL clock
Date: Tue, 26 Sep 2017 16:00:52 +0200
Message-ID: <4487028.9zWcgLXlOk@phil>
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Am Dienstag, 26. September 2017, 15:55:21 CEST schrieb Nickey Yang:
> Mipi-dphy's ref_clk connect to clk_dphy_pll inside rk3399.
> clk_24m -> Gate11[14] -> clk_mipidphy_ref -> Gate21[0] -> clk_dphy_pll
> So correct it.
> 
> Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

I've already applied this patch from the previous version.