From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1FsN55-0000Si-EY for qemu-devel@nongnu.org; Mon, 19 Jun 2006 12:58:31 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1FsN52-0000O9-Bt for qemu-devel@nongnu.org; Mon, 19 Jun 2006 12:58:30 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1FsN51-0000Nl-W3 for qemu-devel@nongnu.org; Mon, 19 Jun 2006 12:58:28 -0400 Received: from [64.233.182.185] (helo=nf-out-0910.google.com) by monty-python.gnu.org with esmtp (Exim 4.52) id 1FsNFM-0005Hj-ON for qemu-devel@nongnu.org; Mon, 19 Jun 2006 13:09:08 -0400 Received: by nf-out-0910.google.com with SMTP id n29so1083915nfc for ; Mon, 19 Jun 2006 09:58:26 -0700 (PDT) Message-ID: <4496D7B7.1090301@gmail.com> Date: Mon, 19 Jun 2006 18:58:31 +0200 MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="------------080300010704080801010308" From: Dirk Behme Subject: [Qemu-devel] [PATCH] Update MIPS status register with EXL and ERL bits at exception Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org This is a multi-part message in MIME format. --------------080300010704080801010308 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit - Fix missing 'or' in target-mips/helper.c while update of hflags with HFLAG_ERL - Update status register EXL and ERL flags directly if entering or leaving exception, not only hflags. With old mechanism, correct status register is returned only if read from target with mfc0 instruction. This is because value of status register is calculated at read time using hflags. GDB, which directly seems to read CP0_Status, doesn't get the correct status register. - Remove then EXL and ERL calculation based on hflags from do_mfc0 because status register now has already the correct value. Signed-off-by: Dirk Behme --------------080300010704080801010308 Content-Type: text/plain; name="mips_status_register_erl_exl_patch.txt" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="mips_status_register_erl_exl_patch.txt" --- ./target-mips/op_helper.c_orig 2006-06-19 18:14:13.000000000 +0200 +++ ./target-mips/op_helper.c 2006-06-19 18:37:05.000000000 +0200 @@ -219,10 +219,6 @@ void do_mfc0 (int reg, int sel) T0 = env->CP0_Status; if (env->hflags & MIPS_HFLAG_UM) T0 |= (1 << CP0St_UM); - if (env->hflags & MIPS_HFLAG_ERL) - T0 |= (1 << CP0St_ERL); - if (env->hflags & MIPS_HFLAG_EXL) - T0 |= (1 << CP0St_EXL); rn = "Status"; break; case 13: --- ./target-mips/op.c_orig 2006-06-19 18:08:40.000000000 +0200 +++ ./target-mips/op.c 2006-06-19 18:31:40.000000000 +0200 @@ -1104,9 +1104,11 @@ void op_eret (void) if (env->hflags & MIPS_HFLAG_ERL) { env->PC = env->CP0_ErrorEPC; env->hflags &= ~MIPS_HFLAG_ERL; + env->CP0_Status &= ~(1 << CP0St_ERL); } else { env->PC = env->CP0_EPC; env->hflags &= ~MIPS_HFLAG_EXL; + env->CP0_Status &= ~(1 << CP0St_EXL); } env->CP0_LLAddr = 1; } --- ./target-mips/helper.c_orig 2006-06-19 18:09:36.000000000 +0200 +++ ./target-mips/helper.c 2006-06-19 18:28:23.000000000 +0200 @@ -332,7 +332,8 @@ void do_interrupt (CPUState *env) } else { env->CP0_ErrorEPC = env->PC; } - env->hflags = MIPS_HFLAG_ERL; + env->hflags |= MIPS_HFLAG_ERL; + env->CP0_Status &= (1 << CP0St_ERL); pc = 0xBFC00000; break; case EXCP_MCHECK: @@ -396,6 +397,7 @@ void do_interrupt (CPUState *env) pc = 0x80000000; } env->hflags |= MIPS_HFLAG_EXL; + env->CP0_Status |= (1 << CP0St_EXL); pc += offset; env->CP0_Cause = (env->CP0_Cause & ~0x7C) | (cause << 2); if (env->hflags & MIPS_HFLAG_BMASK) { --------------080300010704080801010308--