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Date: Tue, 29 Aug 2006 19:35:33 +0400
From: Sergei Shtylyov <sshtylyov@ru.mvista.com>
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To: Kim Phillips <kim.phillips@freescale.com>
Subject: Re: [PATCH] corrected PCI interrupt sense values to level low in
	mpc8349emds.dts
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Hello, I wrote:
>> Corrected PCI interrupt sense values to level low in mpc8349emds.dts, 
>> per Leo's recommendation.

>> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
>> ---

>> applies on top of "[PATCH 4/4] Add MPC8349E MDS device tree source 
>> file to arch/powerpc/boot/dts"

>>  arch/powerpc/boot/dts/mpc8349emds.dts |  112 
>> +++++++++++++++++----------------
>>  1 files changed, 56 insertions(+), 56 deletions(-)
>>
>> diff --git a/arch/powerpc/boot/dts/mpc8349emds.dts 
>> b/arch/powerpc/boot/dts/mpc8349emds.dts
>> index 7e4508b..0643db9 100644
>> --- a/arch/powerpc/boot/dts/mpc8349emds.dts
>> +++ b/arch/powerpc/boot/dts/mpc8349emds.dts
>> @@ -178,46 +178,46 @@
>>              interrupt-map = <
>>  
>>                      /* IDSEL 0x11 */
>> -                     8800 0 0 1 700 14 0
>> -                     8800 0 0 2 700 15 0
>> -                     8800 0 0 3 700 16 0
>> -                     8800 0 0 4 700 17 0
>> +                     8800 0 0 1 700 14 2
>> +                     8800 0 0 2 700 15 2
>> +                     8800 0 0 3 700 16 2
>> +                     8800 0 0 4 700 17 2

>    Since when 2 means level low? 2 is level high, 1 is level low.

   Ah, this board uses IPIC, not OpenPIC. Anyway, this contradicts your own 
comment to the "ipic" device node stating that 8 is the right value for level low.

WBR, Sergei