Re: [PATCH] sparc dbri: hardware constrains added

["Krzysztof Helt" <krzysztof.h1@wp.pl>]

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Dnia 23-08-2006 o godz. 20:18 Takashi Iwai napisa³(a):
> At Wed, 23 Aug 2006 12:53:48 +0200,
> Krzysztof Helt wrote:
> > I started testing the OSS layer and it does not work on sparc32.
> > Is it something broken in the OSS layer for sparc or it is likely
> > a driver issue?
> > 
> > Before my series of patches, I got no sound through the OSS
> > layer. With the patches I got sound but it is played too fast and
> > deformed (random jumps in music play).  I found the OSS layer
> > works by continously starting and stoping sound after each block
> > to send. Is it normal behaviour?
> 
> Doesn't look so.
> 
> Perhaps the PCM middle layer detected XRUN (e.g. due to invalid DMA
> pointer) and automatically restarted? 
> Is prepare called between the frequent triggers?
> 
> 
With the patch I have posted today it is easy to find the pattern
with OSS layer:
1. prepare is called.
2. sound start trigger is called.
3. The driver issues a proper command to a DMA controller.
4. The intterrupt comes which says that DMA controller processed
the sent command.
5. pointer is called and return 0
6. sound stop trigger is called
7. The driver issues a command to stop the DMA controller.
8. The step 1 repeats.

The only difference using the aplay command is that it ignores 0
pointer returned in step 5 and a moment later an interrupt comes
which reports the first period sent by the DMA controller.

Any thoughts whats is wrong with the OSS layer or driver?

Regards,
Krzysztof


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