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From: Jeff Garzik <jeff@garzik.org>
To: Tejun Heo <htejun@gmail.com>
Cc: Kevin Hilman <khilman@mvista.com>, linux-ide@vger.kernel.org
Subject: Re: PCI SATA controllers on embedded, no-BIOS targets
Date: Fri, 08 Sep 2006 08:00:18 -0400	[thread overview]
Message-ID: <45015B52.3000800@garzik.org> (raw)
In-Reply-To: <45011B44.3060101@gmail.com>

Tejun Heo wrote:
> IIRC, Kevin's platform can't do any MMIO.  Also, although sata_sil can 
> be made to use 32-bit address space exclusively, I think having PIO 
> access in the meantime can be helpful to many newer ATI mips platforms 
> out there.  Please note that w/ ioread/write change, the modified code 
> is isolated into init_one(), so the added complexity is small.

Having PIO but not MMIO is _highly_ irregular, especially for non-x86 
platforms.  MMIO is much more common because it is easier to implement 
in hardware than PIO.

As an aside:  We should add a 32-bit variant of ->data_xfer hooks, and 
use where appropriate.

	Jeff



  reply	other threads:[~2006-09-08 12:00 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2006-08-22 16:37 PCI SATA controllers on embedded, no-BIOS targets Kevin Hilman
2006-08-22 16:41 ` Tejun Heo
2006-08-22 16:52   ` Kevin Hilman
2006-08-22 17:26     ` Tejun Heo
2006-08-22 17:31       ` Tejun Heo
2006-08-22 17:37         ` Kevin Hilman
2006-08-22 18:00           ` Tejun Heo
2006-08-22 18:02             ` Tejun Heo
2006-08-22 21:58             ` Kevin Hilman
2006-08-23  3:24               ` Tejun Heo
2006-08-23  3:52                 ` Tejun Heo
2006-09-07 23:05                 ` Kevin Hilman
2006-09-08  1:46                   ` Jeff Garzik
2006-09-08  7:27                     ` Tejun Heo
2006-09-08 12:00                       ` Jeff Garzik [this message]
2006-09-08 16:29                       ` Kevin Hilman
2006-09-08 16:40                         ` Sergei Shtylyov

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