From: Jeff Garzik <jgarzik@pobox.com>
To: Dislo Luo <dislo.bj.luo@gmail.com>
Cc: linux-ide@vger.kernel.org
Subject: Re: AHCI rev 1.1 -- Command Table base address 128-byte cache line
Date: Fri, 22 Sep 2006 05:52:21 -0400 [thread overview]
Message-ID: <4513B255.60900@pobox.com> (raw)
In-Reply-To: <d2b7bd0e0609200049g1b966f4bm5d609bd6dc75d1a4@mail.gmail.com>
Dislo Luo wrote:
> My question is I don't see any 128-byte adjusment ?
> Or pointer return from dma_alloc_coherent already in 128 byte alignment ?
> So we don't bother to do it.
dma_alloc_coherent() returns better than 128-byte alignment
parent reply other threads:[~2006-09-22 9:52 UTC|newest]
Thread overview: expand[flat|nested] mbox.gz Atom feed
[parent not found: <d2b7bd0e0609200049g1b966f4bm5d609bd6dc75d1a4@mail.gmail.com>]
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