From: "David H. Lynch Jr." <dhlii@dlasys.net>
To: linux-serial@vger.kernel.org
Subject: Re: [RFC][PATCH] Xilinx uartlite serial driver
Date: Fri, 06 Oct 2006 00:13:40 -0400 [thread overview]
Message-ID: <4525D7F4.1000200@dlasys.net> (raw)
In-Reply-To: <87hcykkrzu.fsf@slug.be.48ers.dk>
Peter Korsgaard wrote:
>>>>>> "David" == David H Lynch <dhlii@dlasys.net> writes:
>>>>>>
>
> Hi,
>
> David> You force the port regshift value to 2 in your init code,
> David> but then you ignore it and hard code the register offsets
> David> preshifted.
>
> Yes, the regshift value is not used by the driver, I just kept the
> initialization as documentation. The Xilinx IP block afaik cannot be
> configured with a different regshift value than 2, so I hardcoded
> it.
>
> We can change that if it would ever be a problem, but there's
> unfortunately no clean way of representing this in the
> device/ressource data, so I would prefer to leave that out unless it's
> needed.
>
That is actually one of my more major issues. I am NOT the right
person to speak for what direction things are going.
But the majority of drivers - platform device based or otherwise,
pass arround a uart_port structure with the irq, addresses, etc.
the uart_port struct has provisions for a regshift - as well as
other things.
DCR is another issue. I have never personally seen a UartLite DCR
implimentation, but I have a driver from somebody else that started from
mine, that assumes
DCR instead of memory mapped ports. I think the Xilinx Gigabit
Reference System Design connects the UartLite via DCR.
I think DCR has to be a consideration. I do not KNOW that there is a
UartLite implimentation with a regshift other than 2.
But I have seen occasional code that uses different values - The
GreenHills Integrity UartLite driver
has it as a configurable parameter.
If your driver is going to become the officail UartLite driver,
even if it does not already work with every UartLite implimentation, it
still should not start with assumptions that
are going to make supporting others difficult.
Given:
1). a resolution to the configuration issues - reconciling the
IORESOURCE_MEM/IRQ stuff with the uart_port passing of
early_serial_setup() and other drivers, as well as passing
additional parameters such as a dcr option and a regshift - and I am
NOT claiming to know that answer, only recognizing there is an issue.
2). figuring out why your driver drops outbound characters and
fails to receive anything on my hardware.
I would be happy to provide patches to your driver to deal with the
regshift issue, the early serial issue, and operating polled without an
IRQ - the latter of which is critical atleast for my board,
or you can pull them out of the patch I posted on linuxppc-embedded
in January,
or I will send you a current copy
But I spent 4 days trying to find just the dropped xmit character
problem, without success. My driver works on my hardware doing polled IO
- whether the firmware supports interrupts or not, and I the stock
GreenHills integrity driver works interrupt driven on my hardware (with
interrupt enabled firmware).
I would like to see a driver get into the kernel distribution that
has boot-bash serial support, and polled IO, and works on my hardware.
And I will provide my code as a resource and whatever time I can
come up with to help get that.
But anything less requires me to yank whatever is in the kernel and
replace it with my driver.
I have a real production board, with live clients, that uses the
UartLite as the sole serial device, one way or another I have to have
something that works for me.
Interrupt driven support, DCR, and regshift support are extras - but
I am sure they matter to someone else.
> David> Also there is no provision for running the UartLite without
> David> using interrupts. The Pico E12/E14 frequently use FPGA
> David> firmare that does not include a PIC. Some implimentations of
> David> the UartLite use dcr instead of memory mapped ports.
>
> No - again like the early serial stuff that's something that can be
> added once the base driver is mainlined if there's demand.
>
> Does polling even work decently with the small fifo size of the
> uartlite?
>
>
--
Dave Lynch DLA Systems
Software Development: Embedded Linux
717.627.3770 dhlii@dlasys.net http://www.dlasys.net
fax: 1.253.369.9244 Cell: 1.717.587.7774
Over 25 years' experience in platforms, languages, and technologies too numerous to list.
"Any intelligent fool can make things bigger and more complex... It takes a touch of genius - and a lot of courage to move in the opposite direction."
Albert Einstein
next prev parent reply other threads:[~2006-10-06 4:18 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-05-11 14:23 [RFC][PATCH] Xilinx uartlite serial driver Peter Korsgaard
2006-05-11 22:20 ` Russell King
2006-05-16 9:48 ` Peter Korsgaard
2006-05-16 12:09 ` Sylvain Munaut
2006-05-16 12:53 ` Russell King
2006-05-16 13:03 ` Peter Korsgaard
2006-06-02 16:47 ` Russell King
2006-05-16 13:03 ` Sylvain Munaut
2006-05-16 13:07 ` Peter Korsgaard
2006-08-22 15:13 ` Peter Korsgaard
2006-09-12 14:33 ` Olof Johansson
2006-09-13 5:56 ` Peter Korsgaard
2006-09-13 13:39 ` Peter Korsgaard
2006-09-13 15:01 ` Olof Johansson
2006-09-29 19:04 ` David H. Lynch Jr.
2006-09-29 19:57 ` David H. Lynch Jr.
2006-10-04 15:45 ` Peter Korsgaard
2006-10-06 4:14 ` David H. Lynch Jr.
2006-09-30 9:25 ` David H. Lynch Jr.
2006-10-04 16:01 ` Peter Korsgaard
2006-10-06 4:15 ` David H. Lynch Jr.
2006-10-03 10:27 ` David H. Lynch Jr.
[not found] ` <451CDA3D.2060109@dlasys.net>
2006-10-04 15:41 ` Peter Korsgaard
2006-10-06 4:13 ` David H. Lynch Jr. [this message]
2006-10-06 4:14 ` David H. Lynch Jr.
2006-10-06 4:14 ` David H. Lynch Jr.
2006-10-19 23:06 ` Olof Johansson
2006-10-20 12:22 ` Peter Korsgaard
2006-09-28 10:14 ` David H. Lynch Jr.
2006-10-04 15:34 ` Peter Korsgaard
-- strict thread matches above, loose matches on Subject: below --
2006-10-13 14:12 David H. Lynch Jr.
2006-10-13 14:45 ` Peter Korsgaard
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