From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH] drm/i915: Do an initial lockless wait for render completion before pread/pwrite Date: Sun, 16 Dec 2012 18:29:32 +0000 Message-ID: <453bf0$6tgthm@azsmga001.ch.intel.com> References: <1355680315-25793-1-git-send-email-chris@chris-wilson.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga14.intel.com (mga14.intel.com [143.182.124.37]) by gabe.freedesktop.org (Postfix) with ESMTP id 963C0E63D1 for ; Sun, 16 Dec 2012 10:29:46 -0800 (PST) In-Reply-To: <1355680315-25793-1-git-send-email-chris@chris-wilson.co.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Sun, 16 Dec 2012 17:51:55 +0000, Chris Wilson wrote: > Before performing the domain transition for pread/pwrite, and so a locked > completion if still required, wait for any pending rendering locklessly. > This should reduce contention when reading back results from the GPU, for > example. Meh, the pwrite side messes around with the ret=-EFAULT and so screws up the shmem_write patch. -Chris > -- Chris Wilson, Intel Open Source Technology Centre