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From: Aleksandar Markovic <Aleksandar.Markovic@mips.com>
Date: Fri, 22 Jun 2018 13:45:05 +0000
Message-ID: <459ac8395cf141369afb50ca48d78bfb@mips.com>
References: <20180620120620.12806-1-yongbok.kim@mips.com>,
	<20180620120620.12806-2-yongbok.kim@mips.com>
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Subject: Re: [Qemu-devel] [PATCH 01/35] target/mips: Raise a RI when given
 fs is n/a from CTC1
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To: Yongbok Kim <Yongbok.Kim@mips.com>, "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: "aurelien@aurel32.net" <aurelien@aurel32.net>, James Hogan <James.Hogan@mips.com>, Paul Burton <Paul.Burton@mips.com>, Matthew Fortune <Matthew.Fortune@mips.com>, Stefan Markovic <Stefan.Markovic@mips.com>

> From: Yongbok Kim <yongbok.kim@imgtec.com>
>
> Fix to raise a Reserved Instruction exception when given fs is not
> available from CTC1.
>
> Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>

Reviewed-by: Aleksandar Markovic <aleksandar.markovic@mips.com>

> ---
>  target/mips/op_helper.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c
> index 9025f42..41d3634 100644
> --- a/target/mips/op_helper.c
> +++ b/target/mips/op_helper.c
> @@ -2627,6 +2627,9 @@ void helper_ctc1(CPUMIPSState *env, target_ulong ar=
g1, uint32_t fs, uint32_t rt)
>                 (env->active_fpu.fcr31 & ~(env->active_fpu.fcr31_rw_bitma=
sk));
>          break;
>      default:
> +        if (env->insn_flags & ISA_MIPS32R6) {
> +            do_raise_exception(env, EXCP_RI, GETPC());
> +        }
>          return;
>      }
>      restore_fp_status(env);
> --
> 1.9.1