From: "Chris Friesen" <cfriesen@nortel.com>
To: Jan Engelhardt <jengelh@linux01.gwdg.de>
Cc: dean gaudet <dean@arctic.org>, "H. Peter Anvin" <hpa@zytor.com>,
akpm@osdl.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] All Transmeta CPUs have constant TSCs
Date: Mon, 08 Jan 2007 14:51:31 -0600 [thread overview]
Message-ID: <45A2AED3.8070609@nortel.com> (raw)
In-Reply-To: <Pine.LNX.4.61.0701082118370.23737@yvahk01.tjqt.qr>
Jan Engelhardt wrote:
> On Jan 8 2007 00:02, dean gaudet wrote:
>>transmeta decided years before intel and amd that a constant rate tsc
>>(unaffected by P-state) was the only sane choice. on transmeta cpus the
>>tsc increments at the maximum cpu frequency no matter what the P-state
>>(and no matter what longrun is doing behind the kernel's back).
> Well it defeats the purpose of TSC. I mean, they could have kept the "TSC" and
> instead added a second TSC ticker, constant_tsc.
Given that the name is "time stamp counter" then it makes sense to me to
have a constant frequency.
For performance monitoring it would be useful to have a "cpu cycle
counter" that counts clock cycles, and varies (and possibly stops) with
the cpu itself.
Chris
next prev parent reply other threads:[~2007-01-08 20:52 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-01-05 1:48 [PATCH] All Transmeta CPUs have constant TSCs H. Peter Anvin
2007-01-05 14:25 ` Jan Engelhardt
2007-01-08 8:02 ` dean gaudet
2007-01-08 20:19 ` Jan Engelhardt
2007-01-08 20:51 ` Chris Friesen [this message]
2007-01-08 20:51 ` H. Peter Anvin
2007-01-08 23:13 ` dean gaudet
2007-01-08 23:54 ` H. Peter Anvin
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