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From: Jan Kiszka <jan.kiszka@domain.hid>
To: lobby@domain.hid
Cc: adeos-main@gna.org
Subject: Re: [Adeos-main] ADEOS with dcache write through enabled on ARM
Date: Thu, 08 Feb 2007 09:52:53 +0100	[thread overview]
Message-ID: <45CAE4E5.4020508@domain.hid> (raw)
In-Reply-To: <2905.69.70.101.145.1170911698.squirrel@domain.hid>

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lobby@domain.hid wrote:
> Hello,
> 
> I read a suggestion Michael Neuhauser made on a web page to enable dcache
> write through on arm9 processors to improve real time latency on the ARM
> CPU.
> 
> I tried this on a cirrus EP9302 (ARM 920T) on a TS-7400 board and it does
> improve the worst case latency dramaticaly but it causes ramdom
> segmentation violations (init process on a idle machine and also user
> started processes)
> 
> I was wondering if any one has heard of problems on this specific processor
> when CONFIG_CPU_DCACHE_WRITETHROUGH=y with linux kernel 2.4.26 and ADEOS

That means you are using a really old and outdated version of Adeos. Do
you have the chance to test a recent 2.6.19 I-pipe patch as well?

I guess many people are interested in reducing the poor ARM latencies
and would be happy to work on fixing remaining quirks, but development
now takes place around I-pipe, using Xenomai.

> 
> The problem only happens when ADEOS patches are applied together with
> CONFIG_CPU_DCACHE_WRITETHROUGH=y. Having the dcache write through enabled
> without adeos patches works fine.
> 
> Please let me know if I missed something.
> 
> 
> Thank You
> 
> Patrick Robin
> 

Jan


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      reply	other threads:[~2007-02-08  8:52 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-02-08  5:14 [Adeos-main] ADEOS with dcache write through enabled on ARM lobby
2007-02-08  8:52 ` Jan Kiszka [this message]

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