From: Gergely Imre <imre.gergely@astral.ro>
To: Arjan van de Ven <arjan@infradead.org>
Cc: linux-kernel@vger.kernel.org, hancockr@shaw.ca
Subject: Re: irq balancing question
Date: Fri, 23 Feb 2007 22:57:16 +0200 [thread overview]
Message-ID: <45DF552C.6070702@astral.ro> (raw)
In-Reply-To: <1172257289.3241.48.camel@laptopd505.fenrus.org>
Arjan van de Ven wrote:
>> and i guess it doesn't matter if the distribution is being done by the
>> hardware, from the point of view of the kernel, i would still get the
>> performance penalty.
>
> for the cache bouncing you save assuming you have an Intel cpu (eg one
> where the cache is shared). You don't save on the cross-cpu reassembly,
> that is an entire different algorithm path you hit there..
>
>
>
>> i'm just trying to figure it out, i have no real knowledge of the inner
>> kernel workings, so i dont know. but i really would like to use all 4 cores.
>> just how expensive is that reassembly path ?
>
> depends on your traffic to be honest, probably a question more suited
> for net-dev list.
>
i'll look into it, thanks a lot for the comments.
next prev parent reply other threads:[~2007-02-23 20:57 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-02-23 11:32 irq balancing question Imre Gergely
2007-02-23 14:45 ` Arjan van de Ven
2007-02-23 14:58 ` Gergely Imre
2007-02-23 15:54 ` Arjan van de Ven
2007-02-23 18:51 ` Gergely Imre
2007-02-23 19:01 ` Arjan van de Ven
2007-02-23 20:57 ` Gergely Imre [this message]
[not found] <fa.o8VX4Uax4/73QDX3vvhLW5NBvRE@ifi.uio.no>
2007-02-23 14:39 ` Robert Hancock
-- strict thread matches above, loose matches on Subject: below --
2005-12-15 14:00 Pallipadi, Venkatesh
2005-11-17 8:28 ` JaniD++
2005-12-15 0:48 Pallipadi, Venkatesh
2005-12-15 9:10 ` JaniD++
2005-12-14 21:05 JaniD++
2005-12-14 21:16 ` Arjan van de Ven
2005-12-14 21:31 ` JaniD++
2005-12-07 22:52 JaniD++
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